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公开(公告)号:US11729906B2
公开(公告)日:2023-08-15
申请号:US16702723
申请日:2019-12-04
Applicant: Eaton Intelligent Power Limited
Inventor: Kaijam M. Woodley , Michael K. Balck , Matthew J. Koebert
CPC classification number: H05K1/0293 , H01H69/022 , H01H85/0241 , H01H85/046 , H01H85/08 , H01H85/10 , H01H2085/0275 , H05K2201/10181
Abstract: A circuit board with integrated fusing includes an insulating substrate having a circuit trace formed on a surface thereof, the circuit trace including a first circuit trace portion and a second circuit trace portion. A fusible link electrically connects the first circuit trace portion to the second circuit trace portion, the fusible link including a planar surface extending from the first circuit trace portion to the second circuit trace portion. A dielectric reflow encapsulates the fusible link on the planar surface from the first circuit trace portion to the second circuit trace portion.
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公开(公告)号:US12156328B2
公开(公告)日:2024-11-26
申请号:US18219460
申请日:2023-07-07
Applicant: Eaton Intelligent Power Limited
Inventor: Kaijam M. Woodley , Michael K. Balck , Matthew J. Koebert
Abstract: A circuit board with integrated fusing includes an insulating substrate having a circuit trace formed on a surface thereof, the circuit trace including a first circuit trace portion and a second circuit trace portion. A fusible link electrically connects the first circuit trace portion to the second circuit trace portion, the fusible link including a planar surface extending from the first circuit trace portion to the second circuit trace portion. A dielectric reflow encapsulates the fusible link on the planar surface from the first circuit trace portion to the second circuit trace portion.
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公开(公告)号:US20230354512A1
公开(公告)日:2023-11-02
申请号:US18219460
申请日:2023-07-07
Applicant: Eaton Intelligent Power Limited
Inventor: Kaijam M. Woodley , Michael K. Balck , Matthew J. Koebert
IPC: H05K1/02 , H01H85/046 , H01H85/02 , H01H69/02
CPC classification number: H05K1/0293 , H01H85/046 , H01H85/0241 , H01H69/022 , H01H2085/0275 , H05K2201/10181 , H01H85/08
Abstract: A circuit board with integrated fusing includes an insulating substrate having a circuit trace formed on a surface thereof, the circuit trace including a first circuit trace portion and a second circuit trace portion. A fusible link electrically connects the first circuit trace portion to the second circuit trace portion, the fusible link including a planar surface extending from the first circuit trace portion to the second circuit trace portion. A dielectric reflow encapsulates the fusible link on the planar surface from the first circuit trace portion to the second circuit trace portion.
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