公开(公告)号：US20060134873A1

公开(公告)日：2006-06-22

申请号：US11021649

申请日：2004-12-22

申请人： Elisabeth Koontz

发明人： Elisabeth Koontz

IPC分类号： H01L21/336

CPC分类号： H01L21/823814 ,  H01L21/823807 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7848

摘要： The present invention facilitates semiconductor fabrication by providing methods of fabrication that tailor applied strain profiles to channel regions of transistor devices. A strain profile is selected for the channel regions (104). Recessed regions are formed (106) in active regions of a semiconductor device after formation of gate structures according to the selected strain profile. A recess etch (106) is employed to remove a surface portion of the active regions thereby forming the recess regions. Subsequently, a composition controlled recess structure is formed (108) within the recessed regions according to the selected strain profile. The recess structure is comprised of a strain inducing material, wherein one or more of its components are controlled and/or adjusted during formation (108) to tailor the applied vertical channel strain profile.

摘要翻译： 本发明通过提供定制将应变分布应用于晶体管器件的沟道区域的制造方法来促进半导体制造。 为通道区域（104）选择应变分布。 根据所选择的应变分布，在形成栅极结构之后，在半导体器件的有源区中形成（106）凹陷区域。 采用凹陷蚀刻（106）去除活性区域的表面部分，从而形成凹陷区域。 随后，根据所选择的应变分布，在凹陷区域内形成组合物控制的凹陷结构（108）。 凹陷结构由应变诱导材料组成，其中其一个或多个部件在形成期间被控制和/或调整（108）以调整施加的垂直通道应变分布。

公开(公告)号：US20060024067A1

公开(公告)日：2006-02-02

申请号：US10901828

申请日：2004-07-28

申请人： Elisabeth Koontz

发明人： Elisabeth Koontz

IPC分类号： H04B10/04

CPC分类号： G02B6/43 ,  G02F1/025 ,  G02F2201/06 ,  H01L31/12

摘要： Generally, an embodiment of the present invention provides an optical input/output (I/O) chip that is fabricated separately and distinctly from an electrical integrated circuit chip having core circuitry thereon. The electronic and optical I/O chips are later electrically connected (e.g., using packing technology) to form a hybrid optical-electronic chip system that utilizes optical I/O components on the optical I/O chip to communicate at least some of the I/O signals into and out of the electrical integrated circuit on the distinct electronic chip.

摘要翻译： 通常，本发明的实施例提供了与其上具有核心电路的电集成电路芯片分离制造的光输入/输出（I / O）芯片。 电子和光学I / O芯片随后电连接（例如，使用打包技术）以形成混合光电子芯片系统，其利用光学I / O芯片上的光学I / O组件来通信至少一些I / O信号进入和离开不同电子芯片上的电气集成电路。

公开(公告)号：US20070249168A1

公开(公告)日：2007-10-25

申请号：US11379408

申请日：2006-04-20

申请人： Antonio Rotondaro ,  Trace Hurd ,  Elisabeth Koontz

发明人： Antonio Rotondaro ,  Trace Hurd ,  Elisabeth Koontz

IPC分类号： H01L21/311

CPC分类号： H01L21/30608 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7848

摘要： A semiconductor device 100 comprising a gate structure 105 on a semiconductor substrate 110 and a recessed-region 115 in the semiconductor substrate. The recessed-region has a widest lateral opening 120 that is near a top surface 122 of the semiconductor substrate. The widest lateral opening undercuts the gate structure.

摘要翻译： 半导体器件100包括在半导体衬底110上的栅极结构105和半导体衬底中的凹陷区域115。 凹陷区域具有最接近半导体衬底的顶表面122的侧向开口120。 最宽的侧向开口会削弱门结构。