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公开(公告)号：US20050108496A1
公开(公告)日：2005-05-19
申请号：US10713733
申请日：2003-11-13
CPC分类号： G06F12/1045
摘要： A method of assigning virtual memory to physical memory in a data processing system allocates a set of contiguous physical memory pages for a new page mapping, instructs the memory controller to move the virtual memory pages according to the new page mapping, and then allows access to the virtual memory pages using the new page mapping while the memory controller is still copying the virtual memory pages to the set of physical memory pages. The memory controller can use a mapping table which temporarily stores entries of the old and new page addresses, and releases the entries as copying for each entry is completed. The translation lookaside buffer (TLB) entries in the processor cores are updated for the new page addresses prior to completion of copying of the memory pages by the memory controller. The invention can be extended to non-uniform memory array (NUMA) systems. For systems with cache memory, any cache entry which is affected by the page move can be updated by modifying its address tag according to the new page mapping. This tag modification may be limited to cache entries in a dirty coherency state. The cache can further relocate a cache entry based on a changed congruence class for any modified address tag.
摘要翻译： 将虚拟存储器分配给数据处理系统中的物理存储器的方法为新的页面映射分配一组连续的物理存储器页面，指示存储器控制器根据新的页面映射移动虚拟存储器页面，然后允许访问 虚拟内存页面使用新页面映射，而内存控制器仍将虚拟内存页面复制到物理内存页面集合。 存储器控制器可以使用临时存储旧页面地址和新页面地址的条目的映射表，并且对于每个条目的拷贝完成，释放条目。 在由存储器控制器完成对存储器页面的复制之前，处理器核心中的翻译后备缓冲器（TLB）条目针对新的页地址进行更新。 本发明可以扩展到非均匀存储器阵列（NUMA）系统。 对于具有缓存内存的系统，可以通过根据新页面映射修改其地址标签来更新受页面移动影响的任何缓存条目。 该标签修改可能被限制在脏相关性状态下的高速缓存条目。 高速缓存可以根据修改后的地址标签的改变的一致性类别进一步重新定位缓存条目。
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公开(公告)号：US20070067604A1
公开(公告)日：2007-03-22
申请号：US11551168
申请日：2006-10-19
IPC分类号： G06F12/00
CPC分类号： G06F12/1045
摘要： A method of assigning virtual memory to physical memory in a data processing system allocates a set of contiguous physical memory pages for a new page mapping, instructs the memory controller to move the virtual memory pages according to the new page mapping, and then allows access to the virtual memory pages using the new page mapping while the memory controller is still copying the virtual memory pages to the set of physical memory pages. The memory controller can use a mapping table which temporarily stores entries of the old and new page addresses, and releases the entries as copying for each entry is completed. The translation look aside buffer (TLB) entries in the processor cores are updated for the new page addresses prior to completion of copying of the memory pages by the memory controller. The invention can be extended to non-uniform memory array (NUMA) systems. For systems with cache memory, any cache entry which is affected by the page move can be updated by modifying its address tag according to the new page mapping. This tag modification may be limited to cache entries in a dirty coherency state. The cache can further relocate a cache entry based on a changed congruence class for any modified address tag.
摘要翻译： 将虚拟存储器分配给数据处理系统中的物理存储器的方法为新的页面映射分配一组连续的物理存储器页面，指示存储器控制器根据新的页面映射移动虚拟存储器页面，然后允许访问 虚拟内存页面使用新页面映射，而内存控制器仍将虚拟内存页面复制到物理内存页面集合。 存储器控制器可以使用临时存储旧页面地址和新页面地址的条目的映射表，并且对于每个条目的拷贝完成，释放条目。 在存储器控制器完成内存页复制之前，处理器核心中的缓冲区（TLB）条目将被更新为新页面地址。 本发明可以扩展到非均匀存储器阵列（NUMA）系统。 对于具有缓存内存的系统，可以通过根据新页面映射修改其地址标签来更新受页面移动影响的任何缓存条目。 该标签修改可能被限制在脏相关性状态下的高速缓存条目。 高速缓存可以根据修改后的地址标签的改变的一致性类别进一步重新定位缓存条目。
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3.发明申请公开(公告)号：US20050086438A1
公开(公告)日：2005-04-21
申请号：US10687261
申请日：2003-10-16
CPC分类号： G06F12/0813 , G06F12/0817
摘要： A multiprocessor system includes a plurality of data processing nodes. Each node has a processor coupled to a system memory, a cache memory, and a cache directory. The cache directory contains cache coherency information for a predetermined range of system memory addresses. An interconnection enables the nodes to exchange messages. A node initiating a function shipping request identifies an intermediate destination directory based on a list of the function's operands and sends a message indicating the function and its corresponding operands to the identified destination directory. The destination cache directory determines a target node based, at least in part, on its cache coherency status information to reduce memory access latency by selecting a target node where all or some of the operands are valid in the local cache memory. The destination directory then ships the function to the target node over the interconnection.
摘要翻译： 多处理器系统包括多个数据处理节点。 每个节点具有耦合到系统存储器，高速缓存存储器和高速缓存目录的处理器。 缓存目录包含用于系统存储器地址的预定范围的高速缓存一致性信息。 互连使得节点能够交换消息。 启动功能运送请求的节点基于功能的操作数列表识别中间目的地目录，并向指定的目的地目录发送一个指示该功能及其对应操作数的消息。 目的地缓存目录至少部分地基于其高速缓存一致性状态信息来确定目标节点，以通过选择其中全部或某些操作数在本地高速缓冲存储器中有效的目标节点来减少存储器访问等待时间。 目的地目录然后通过互连将功能发送到目标节点。
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公开(公告)号：US08844314B2
公开(公告)日：2014-09-30
申请号：US13166102
申请日：2011-06-22
申请人： Anderson Bortoletto , Rogerio Soares Brisola , Douglas D. Leclear , James Peterson , Fabio E. Rosa , Vanessa Christina Riberio , Simone M. Vidal , Ronald L. Voglewede
发明人： Anderson Bortoletto , Rogerio Soares Brisola , Douglas D. Leclear , James Peterson , Fabio E. Rosa , Vanessa Christina Riberio , Simone M. Vidal , Ronald L. Voglewede
CPC分类号： F25C1/08 , F25C1/18 , F25C2305/022 , F25C2400/10 , F25C2400/14
摘要： A clear ice making system and method utilizes an ice tray including a plurality of ice forming cavities extending into a fluid supply cavity. Fluid supplied to the fluid supply cavity flows into each of the plurality of ice forming cavities and out through respective fluid outlets located in a bottom portion of the ice forming cavities to a fluid outlet chamber below. Cooled ice forming members extend into respective ice forming cavities. Fluid is continuously cycled through the ice forming cavities and around the ice forming members during an ice making event such that clear ice pieces gradually form on each of the ice forming members. During an ice harvest event, ice forming members are heated to release formed ice pieces, and the ice pieces are transferred from a fresh food compartment of a refrigerator to an ice storage bucket located in a freezer compartment of the refrigerator.
摘要翻译： 清晰的制冰系统和方法利用包括延伸到流体供应腔中的多个成冰腔的冰盘。 提供给流体供应腔的流体流入多个冰形成空腔中的每一个，并且通过位于冰形成腔的底部中的相应流体出口流出到下面的流体出口室。 冷成冰构件延伸到各自的制冰腔中。 流体在制冰事件期间连续循环穿过成冰腔并在冰层周围，从而在每个冰成形构件上逐渐形成清晰的冰块。 在冰捕获事件期间，加热冰形成部件以释放形成的冰块，并将冰块从冰箱的新鲜食物室转移到位于冰箱的冷冻室中的储冰桶中。
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公开(公告)号：US08667408B2
公开(公告)日：2014-03-04
申请号：US12718827
申请日：2010-03-05
申请人： James Peterson , Brian Powell
发明人： James Peterson , Brian Powell
IPC分类号： G06F3/048
摘要： A system for generating customized badges. The system includes a computer, a printer coupled to the computer, a display coupled to the computer, and a computer readable medium. The computer readable medium includes instructions for opening a badge profile, providing a data entry screen based on the profile, receiving data in the data entry screen, and printing customized badges on the printer based on the received data. The badge profile defines a size, type, and location of data to be printed on the customized badges.
摘要翻译： 用于生成自定义徽章的系统。 该系统包括计算机，耦合到计算机的打印机，耦合到计算机的显示器和计算机可读介质。 计算机可读介质包括用于打开徽章简档的指令，基于简档提供数据输入屏幕，在数据输入屏幕中接收数据，以及基于接收的数据在打印机上打印定制的徽章。 徽章配置文件定义要打印在自定义徽章上的数据的大小，类型和位置。
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6.发明申请APPARATUS, SYSTEM, AND METHOD FOR INDEXING DATA OF AN APPEND-ONLY, LOG-BASED STRUCTURE 有权用于索引附录数据的设备，系统和方法，基于日志的结构公开(公告)号：US20130024460A1
公开(公告)日：2013-01-24
申请号：US13531316
申请日：2012-06-22
申请人： James Peterson , Evan Orme , Kevin Vigor , Michael Zappe
发明人： James Peterson , Evan Orme , Kevin Vigor , Michael Zappe
IPC分类号： G06F17/30
CPC分类号： G06F3/064 , G06F3/061 , G06F3/0679 , G06F12/0246 , G06F2212/7201 , G06F2212/7207
摘要： Methods for indexing data of an append-only, log-based structure include writing a plurality of data packets to a storage medium by sequentially appending the data packets to a log-based structure of the storage medium, the data packets associated with different logical identifiers belonging to a logical address space that is independent of physical storage locations on the storage media. The methods may further include writing an index segment associated with the plurality of data packets to the log-based structure, the index segment comprising index entries for determining the logical identifiers of the data packets and recording, on the storage media, information indicating where the index segment is written on the storage medium.
摘要翻译： 用于索引仅追加日志的结构的数据的方法包括通过将数据分组顺序地附加到存储介质的基于日志的结构来将多个数据分组写入到存储介质，与不同逻辑标识符相关联的数据分组 属于与存储介质上的物理存储位置无关的逻辑地址空间。 所述方法还可以包括将与所述多个数据分组相关联的索引片段写入到所述基于日志的结构，所述索引片段包括用于确定所述数据分组的逻辑标识符的索引条目，并且在所述存储介质上记录指示 索引片段写在存储介质上。
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公开(公告)号：US08212880B2
公开(公告)日：2012-07-03
申请号：US12339444
申请日：2008-12-19
IPC分类号： H04N5/228
CPC分类号： H04N5/2252 , H04N5/2258 , H04N5/23248 , H04N5/23254 , H04N5/23258 , H04N5/23287 , H04N5/332
摘要： An image stabilization system includes an optical assembly configured to receive electromagnetic radiation emitted by a target and produce focused image of the target; a focal plane array, the focal plane array being configured to receive the image and integrate at least a portion of the electromagnetic radiation making up the image to produce an electrical representation of the image; sensors configured to provide kinematic data; a control system receiving the kinematic data and estimating jitter-induced motion of the image on the focal plane and outputting a control signal; and actuators configured to receive the control signal and to translate the focal plane along two orthogonal axes and rotate the focal plane about a third orthogonal axis such that jitter-induced motion of the image on the focal plane is reduced.
摘要翻译： 图像稳定系统包括被配置为接收由目标发射的电磁辐射并产生目标的聚焦图像的光学组件; 焦平面阵列，焦平面阵列被配置为接收图像并且对构成图像的电磁辐射的至少一部分进行积分以产生图像的电表示; 被配置为提供运动学数据的传感器; 接收运动学数据并估计焦平面上的图像的抖动引起的运动并输出控制信号的控制系统; 以及致动器，被配置为接收所述控制信号并沿着两个正交轴平移所述焦平面，并且围绕第三正交轴旋转所述焦平面，使得所述焦平面上的图像的抖动引起的运动减小。
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8.发明申请REDUCING DATA HAZARDS IN PIPELINED PROCESSORS TO PROVIDE HIGH PROCESSOR UTILIZATION 有权在管道处理器中减少数据危害提供高处理器利用率公开(公告)号：US20100228953A1
公开(公告)日：2010-09-09
申请号：US12782474
申请日：2010-05-18
CPC分类号： G06F9/30098 , G06F9/30079 , G06F9/325 , G06F9/355 , G06F9/3885
摘要： A pipelined computer processor is presented that reduces data hazards such that high processor utilization is attained. The processor restructures a set of instructions to operate concurrently on multiple pieces of data in multiple passes. One subset of instructions operates on one piece of data while different subsets of instructions operate concurrently on different pieces of data. A validity pipeline tracks the priming and draining of the pipeline processor to ensure that only valid data is written to registers or memory. Pass-dependent addressing is provided to correctly address registers and memory for different pieces of data.
摘要翻译： 提出了一种流水线计算机处理器，可减少数据危害，从而达到高处理器利用率。 处理器重组一组指令以在多遍中同时对多条数据进行操作。 指令的一个子集对一个数据进行操作，而不同的指令子集同时在不同的数据片上进行操作。 有效流水线跟踪流水线处理器的启动和排水，以确保仅将有效数据写入寄存器或存储器。 提供通过依赖寻址来正确地寻址不同数据块的寄存器和存储器。
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9.发明授权Reducing data hazards in pipelined processors to provide high processor utilization 有权降低流水线处理器中的数据危害，提供高处理器利用率公开(公告)号：US07734899B2
公开(公告)日：2010-06-08
申请号：US11711288
申请日：2007-02-26
CPC分类号： G06F9/30098 , G06F9/30079 , G06F9/325 , G06F9/355 , G06F9/3885
摘要： A pipelined computer processor is presented that reduces data hazards such that high processor utilization is attained. The processor restructures a set of instructions to operate concurrently on multiple pieces of data in multiple passes. One subset of instructions operates on one piece of data while different subsets of instructions operate concurrently on different pieces of data. A validity pipeline tracks the priming and draining of the pipeline processor to ensure that only valid data is written to registers or memory. Pass-dependent addressing is provided to correctly address registers and memory for different pieces of data.
摘要翻译： 提出了一种流水线计算机处理器，可减少数据危害，从而达到高处理器利用率。 处理器重组一组指令以在多遍中同时对多条数据进行操作。 指令的一个子集对一个数据进行操作，而不同的指令子集同时在不同的数据片上进行操作。 有效流水线跟踪流水线处理器的启动和排水，以确保仅将有效数据写入寄存器或存储器。 提供通过依赖寻址来正确地寻址不同数据块的寄存器和存储器。
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公开(公告)号：US20070043781A1
公开(公告)日：2007-02-22
申请号：US11588003
申请日：2006-10-26
申请人： Yuri Basin , Michael Beirne , James Peterson , Karen Peterson
发明人： Yuri Basin , Michael Beirne , James Peterson , Karen Peterson
IPC分类号： G06F17/30
CPC分类号： G06F16/1744 , G06F11/1451 , H03M7/30 , H04L67/16 , H04L69/329 , Y10S707/99931 , Y10S707/99942 , Y10S707/99943 , Y10S707/99953
摘要： A computer program for managing and manipulating archive zip files of a computer. The program includes a system and method for opening, creating, and modifying, and extracting zip archive files. The program is fully integrated into Microsoft Windows Explorer and is accessed via Explorer menus, toolbars, and/or drag and drop operations. An important feature of the program is the archive manager which may be used to open a zip file, create a new zip file, extract zip files, modify zip files, etc. The program is integrated into Microsoft Windows Explorer using the shell name space extension application program interface developed by Microsoft.
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