-
公开(公告)号：US20230074022A1
公开(公告)日：2023-03-09
申请号：US17470221
申请日：2021-09-09
发明人： Rui ZHOU , Yincan MAO , Qianqian JIAO , Alap SHAH , Jianwu CAO
摘要： Power converters with power factor correction circuits and controllers thereof that are configured to generate frequency-adjustable first and second pulsed signals having respective and complementary phases separated by an adjustable deadtime. For example, a power converter may be configured to receive an alternating current (AC) input signal and output a direct current (DC) output signal. The power converter may include at least one DC/DC converter and a power factor correction circuit. The power factor correction circuit may include a first switching transistor comprising a first gate; a second switching transistor in series with the first switching transistor and comprising a second gate; and a controller configured to generate first and second pulsed signals having respective and complementary phases and separated by an adjustable deadtime and apply the generated first and second pulsed signals to the first and second gates, respectively.
-
公开(公告)号：US20230076369A1
公开(公告)日：2023-03-09
申请号：US17470249
申请日：2021-09-09
发明人： Rui ZHOU , Yincan MAO , Qianqian JIAO , Alap SHAH , Jianwu CAO
摘要： Power converters with power factor correction circuits and controllers thereof that are configured to generate frequency-adjustable first and second pulsed signals having respective and complementary phases separated by an adjustable deadtime. For example, a power converter may be configured to receive an alternating current (AC) input signal and output a direct current (DC) output signal. The power converter may include a transformer and a power factor correction circuit. The power factor correction circuit may include: a first switching transistor and a second switching transistor in series with the first switching transistor; and a controller configured to generate first and second pulsed signals having respective and complementary phases and separated by an adjustable deadtime and apply the generated first and second pulsed signals to the first and second transistors, respectively. A primary side of the transformer may be coupled to a node between the first and second switching transistors.
-
公开(公告)号：US20230071003A1
公开(公告)日：2023-03-09
申请号：US17470201
申请日：2021-09-09
发明人： Rui ZHOU , Yincan MAO , Qianqian JIAO , Alap SHAH , Jianwu CAO
摘要： Power factor correction circuits and controllers thereof that are configured to generate frequency-adjustable first and second pulsed signals having respective and complementary phases separated by an adjustable deadtime. For example, a controller for a power factor correction circuit may include a comparator, a frequency controller, and a deadtime controller. The controller may be configured to: receive an input signal comprising a measured output voltage of the power factor correction circuit; compare, via the comparator, the measured output voltage with a set point, resulting in a difference between the measured output voltage and the set point; feed the difference into the frequency controller and adjust a frequency of the first and second pulsed signals based on an output of the frequency controller; and provide the difference to the deadtime controller and adjust the deadtime of the first and second pulsed signals based on an output of the deadtime controller.
-
-
搜索结果
3 条记录 (耗时 0.018 秒)