公开(公告)号：US08964791B2

公开(公告)日：2015-02-24

申请号：US13649461

申请日：2012-10-11

Applicant: Freescale Semiconductor, Inc.

Inventor： Mieu Van Vu ,  John J. Vaglica

IPC: H04J3/06 ,  H04L1/00

CPC classification number: H04L1/0008 ,  H04W24/06 ,  Y02D70/00

Abstract: A method and apparatus automatically maintains a JESD204 serial data link (252) as active by using an idle signal (254) and multiplexer selection circuit (247) to selectively switch signal data samples (246) and dummy samples (0, . . . 0) onto a serial interface input to a JESD module (248) for serialization into a plurality of symbols for transmission over the JESD204 serial data link (252) in response to a transmit clock signal (253) so that serialized symbols generated from signal data samples are transmitted when there are signal data samples available, and serialized symbols generated from dummy samples are transmitted when there are no signal data samples available.

Abstract translation: 一种方法和装置通过使用空闲信号（254）和多路复用器选择电路（247）自动地将JESD204串行数据链路（252）维持有效，以选择性地切换信号数据样本（246）和虚拟样本（0，...） ）到输入到JESD模块（248）的串行接口，用于串行化成多个符号，以响应于发送时钟信号（253）在JESD204串行数据链路（252）上传输，从而从信号数据样本产生的串行化符号 当有信号数据样本可用时发送，并且当没有信号数据样本可用时，从伪样本生成的串行符号被发送。

公开(公告)号：US20140105101A1

公开(公告)日：2014-04-17

申请号：US13649461

申请日：2012-10-11

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Mieu Van Vu ,  John J. Vaglica

IPC: H04W88/08

CPC classification number: H04L1/0008 ,  H04W24/06 ,  Y02D70/00

Abstract: A method and apparatus automatically maintains a JESD204 serial data link (252) as active by using an idle signal (254) and multiplexer selection circuit (247) to selectively switch signal data samples (246) and dummy samples (0, . . . 0) onto a serial interface input to a JESD module (248) for serialization into a plurality of symbols for transmission over the JESD204 serial data link (252) in response to a transmit clock signal (253) so that serialized symbols generated from signal data samples are transmitted when there are signal data samples available, and serialized symbols generated from dummy samples are transmitted when there are no signal data samples available.

Abstract translation: 一种方法和装置通过使用空闲信号（254）和多路复用器选择电路（247）自动地将JESD204串行数据链路（252）维持有效，以选择性地切换信号数据样本（246）和虚拟样本（0，...） ）到输入到JESD模块（248）的串行接口，用于串行化成多个符号，以响应于发送时钟信号（253）在JESD204串行数据链路（252）上传输，从而从信号数据样本产生的串行化符号 当有信号数据样本可用时发送，并且当没有信号数据样本可用时，从伪样本生成的串行符号被发送。