Method for forming a self-aligned T-shaped isolation trench
    1.
    发明授权
    Method for forming a self-aligned T-shaped isolation trench 失效
    用于形成自对准隔离沟槽的方法

    公开(公告)号:US07749860B2

    公开(公告)日:2010-07-06

    申请号:US09392034

    申请日:1999-09-08

    IPC分类号: H01L21/764 H01L29/00

    CPC分类号: H01L21/76237

    摘要: The present invention relates to a method for forming an isolation trench structure in a semiconductor substrate without causing deleterious topographical depressions in the upper surface thereof which cause current and charge leakage to an adjacent active area. The inventive method forms a pad oxide upon a semiconductor substrate, and then forms a nitride layer on the pad oxide. The nitride layer is patterned with a mask and etched to expose a portion of the pad oxide layer and to protect an active area in the semiconductor substrate that remains covered with the nitride layer. A second dielectric layer is formed substantially conformably over the pad oxide layer and the remaining portions of the first dielectric layer. A spacer etch is then carried out to form a spacer from the second dielectric layer. The spacer is in contact with the remaining portion of the first dielectric layer. An isolation trench etch follows the spacer etch. An optional thermal oxidation of the surfaces in the isolation trench may be performed, which may optionally be followed by doping of the bottom of the isolation trench to further isolate neighboring active regions on either side of the isolation trench. A conformal layer is formed substantially conformably over the spacer, over the remaining portions of the first dielectric layer, and substantially filling the isolation trench. Planarization of the conformal layer follows, either by CMP or by etchback or by a combination thereof. An isolation trench filled with a structure results. The resulting structure has a flange and shaft, the cross-section of which has a nail shape in cross-section.

    摘要翻译: 本发明涉及一种用于在半导体衬底中形成隔离沟槽结构的方法,而不会在其上表面造成有害的地形凹陷,这导致电流和电荷泄漏到相邻的有效区域。 本发明的方法在半导体衬底上形成衬垫氧化物,然后在衬底氧化物上形成氮化物层。 用掩模对氮化物层进行图案化并蚀刻以暴露焊盘氧化物层的一部分并保护半导体衬底中保留被氮化物层覆盖的有源区。 第二电介质层基本上顺应地形成在焊盘氧化物层和第一电介质层的剩余部分上。 然后进行间隔物蚀刻以从第二介电层形成间隔物。 间隔物与第一电介质层的剩余部分接触。 隔离沟蚀刻遵循间隔物蚀刻。 可以执行隔离沟槽中的表面的可选热氧化,其可以任选地随后掺杂隔离沟槽的底部以进一步隔离隔离沟槽的任一侧上的相邻有源区。 在第一介电层的剩余部分上基本上顺应地形成保形层,并基本上填充隔离沟槽。 通过CMP或通过回蚀或其组合,可以平铺保形层。 填充结构的隔离沟槽结果。 所得到的结构具有法兰和轴,其横截面具有指甲形状的横截面。