公开(公告)号：US5617430A

公开(公告)日：1997-04-01

申请号：US171492

申请日：1993-12-22

申请人： Frank W. Angelotti ,  Wayne A. Britson ,  Steven M. Douskey ,  Kerry T. Kaliszewski ,  Michael A. Weed

发明人： Frank W. Angelotti ,  Wayne A. Britson ,  Steven M. Douskey ,  Kerry T. Kaliszewski ,  Michael A. Weed

IPC分类号： G01R31/04 ,  G01R31/3185 ,  G01R31/28

CPC分类号： G01R31/31855 ,  G01R31/041

摘要： An electronics systems having variable interconnections among major components is tested by dynamically identifying the locations and types of all system components at the time the test is to be performed, for building a global model describing the interconnections among these components. Specific tests appropriate for this model are then dynamically generated and executed. Data on the components themselves identifies them. The tests employ boundary-scanning techniques to locate failing drivers, receivers, and bidirectional driver/receivers, as well as open and shorted interconnections.

摘要翻译： 在主要组件之间具有可变互连的电子系统通过在执行测试时动态地识别所有系统组件的位置和类型来测试，以构建描述这些组件之间的互连的全局模型。 然后动态生成并执行与该模型相适应的特定测试。 组件上的数据本身标识它们。 这些测试采用边界扫描技术来定位故障驱动器，接收器和双向驱动器/接收器，以及开放和短路互连。

公开(公告)号：US09008196B2

公开(公告)日：2015-04-14

申请号：US13456277

申请日：2012-04-26

申请人： Frank W. Angelotti ,  Michael D. Campbell ,  Kenneth L. Christian ,  Martin Eckert ,  Hubert Harrer ,  Rohan Jones ,  Neil A. Malek ,  Gary A. Peterson ,  Andrew A. Turner ,  Dermot Weldon

发明人： Frank W. Angelotti ,  Michael D. Campbell ,  Kenneth L. Christian ,  Martin Eckert ,  Hubert Harrer ,  Rohan Jones ,  Neil A. Malek ,  Gary A. Peterson ,  Andrew A. Turner ,  Dermot Weldon

IPC分类号： H04L27/00 ,  G06F13/10 ,  G06F13/00

CPC分类号： G06F13/102

摘要： A computer system includes a processor, and the processor includes at least one interface for communicating with an electronic component. Each of the at least one interface has a set of interface settings. The computer system further includes a memory containing machine executable instructions. Execution of the instructions causes the processor to: monitor communications traffic on the at least one interface; store, eye distribution data acquired during the monitoring of the communications traffic in a database; compare the eye distribution data to a set of predetermined criteria; and generate a set of updated interface settings if the eye distribution does not satisfy the set of predetermined criteria.

摘要翻译： 计算机系统包括处理器，并且处理器包括用于与电子部件通信的至少一个接口。 至少一个接口中的每一个具有一组接口设置。 计算机系统还包括含有机器可执行指令的存储器。 指令的执行导致处理器：监视至少一个接口上的通信流量; 在监视数据库内的通信流量时获取的眼睛分布数据; 将眼睛分布数据与一组预定标准进行比较; 并且如果眼睛分​​布不满足预定标准的集合，则生成一组更新的界面设置。

公开(公告)号：US20120278519A1

公开(公告)日：2012-11-01

申请号：US13456277

申请日：2012-04-26

申请人： Frank W. Angelotti ,  Michael D. Campbell ,  Kenneth L. Christian ,  Martin Eckert ,  Hubert Harrer ,  Rohan Jones ,  Neil A. Malek ,  Gary A. Peterson ,  Andrew A. Turner ,  Dermot Weldon

发明人： Frank W. Angelotti ,  Michael D. Campbell ,  Kenneth L. Christian ,  Martin Eckert ,  Hubert Harrer ,  Rohan Jones ,  Neil A. Malek ,  Gary A. Peterson ,  Andrew A. Turner ,  Dermot Weldon

IPC分类号： G06F13/36

CPC分类号： G06F13/102

摘要： A computer system includes a processor, and the processor includes at least one interface for communicating with an electronic component. Each of the at least one interface has a set of interface settings. The computer system further includes a memory containing machine executable instructions. Execution of the instructions causes the processor to: monitor communications traffic on the at least one interface; store, eye distribution data acquired during the monitoring of the communications traffic in a database; compare the eye distribution data to a set of predetermined criteria; and generate a set of updated interface settings if the eye distribution does not satisfy the set of predetermined criteria.

摘要翻译： 计算机系统包括处理器，并且处理器包括用于与电子部件通信的至少一个接口。 至少一个接口中的每一个具有一组接口设置。 计算机系统还包括含有机器可执行指令的存储器。 指令的执行导致处理器：监视至少一个接口上的通信流量; 在监视数据库内的通信流量时获取的眼睛分布数据; 将眼睛分布数据与一组预定标准进行比较; 并且如果眼睛分​​布不满足预定标准的集合，则生成一组更新的界面设置。

公开(公告)号：US06909274B2

公开(公告)日：2005-06-21

申请号：US10420431

申请日：2003-04-21

申请人： Frank W. Angelotti ,  Louis B. Bushard ,  Matthew S. Grady ,  Scott A. Strissel

发明人： Frank W. Angelotti ,  Louis B. Bushard ,  Matthew S. Grady ,  Scott A. Strissel

IPC分类号： G01R31/3185 ,  G01R31/28

CPC分类号： G01R31/318577

摘要： A test apparatus and a method for testing an integrated circuit's data storage device's input/output signal pins for alternating current (AC) defects, by providing an interface that will couple each respective individual test contact, in a subset of said contacts, to a select plurality of the data storage input/output signal pins so that when a selected data string is introduced into the integrated circuit so that each input/output pin on a data storage device in the integrated circuit will be tested in sequence whereby the number of contacts required by the tester can be reduced.

公开(公告)号：US06590382B2

公开(公告)日：2003-07-08

申请号：US09747902

申请日：2000-12-22

申请人： Frank W. Angelotti ,  Louis B. Bushard ,  Matthew S. Grady ,  Scott A. Strissel

发明人： Frank W. Angelotti ,  Louis B. Bushard ,  Matthew S. Grady ,  Scott A. Strissel

IPC分类号： G01R3126

CPC分类号： G01R31/318577

摘要： A test apparatus and a method for testing an integrated circuit's data storage device's input/output signal pins for alternating current (AC) defects, by providing an interface that will couple each respective individual test contact, in a subset of said contacts, to a select plurality of the data storage input/output signal pins so that when a selected data string is introduced into the integrated circuit so that each input/output pin on a data storage device in the integrated circuit will be tested in sequence whereby the number of contacts required by the tester can be reduced.