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    CORE LOAD KNOWLEDGE FOR ELASTIC LOAD BALANCING OF THREADS
    1.
    发明申请
    CORE LOAD KNOWLEDGE FOR ELASTIC LOAD BALANCING OF THREADS 审中-公开
    用于弹性载荷平衡的核心载荷知识

    公开(公告)号：US20170039093A1

    公开(公告)日：2017-02-09

    申请号：US14818253

    申请日：2015-08-04

    Applicant: Futurewei Technologies, Inc.

    Inventor： Zongfang Lin ,  Chen Tian ,  Feng Ye ,  Jiachen Xue ,  Ziang Hu

    IPC: G06F9/50 ,  G06F9/48

    CPC classification number: G06F9/5083 ,  G06F9/5066 ,  G06F2209/5018

    Abstract: A method of balancing load on multiple cores includes maintaining multiple bitmaps in a global memory location. Each bitmap indicates loads of the threads included in a thread domain. The multiple threads are associated with each core. Each core maintains and updates the respective bitmap based on the loads of the threads. The multiple bitmaps are maintained in the global memory location which is accessible by a multiple thread domains configured to execute threads using the cores. Execution of the multiple thread domains is balanced using the multiple cores based on loads of each thread described in each bitmap.

    Abstract translation: 在多个核心上平衡负载的方法包括在全局存储器位置保持多个位图。 每个位图指示线程域中包含的线程的负载。 多个线程与每个核心相关联。 每个核心基于线程的负载维护和更新相应的位图。 多个位图被保留在全局存储器位置，该位置可被配置为使用内核执行线程的多个线程域访问。 基于每个位图中描述的每个线程的负载，使用多个核来平衡多个线程域的执行。

    APPARATUS, METHOD, AND COMPUTER PROGRAM FOR UTILIZING SECONDARY THREADS TO ASSIST PRIMARY THREADS IN PERFORMING APPLICATION TASKS
    2.
    发明申请
    APPARATUS, METHOD, AND COMPUTER PROGRAM FOR UTILIZING SECONDARY THREADS TO ASSIST PRIMARY THREADS IN PERFORMING APPLICATION TASKS 审中-公开
    在执行应用任务时使用辅助线程来辅助主线程的装置，方法和计算机程序

    公开(公告)号：US20170031724A1

    公开(公告)日：2017-02-02

    申请号：US14815875

    申请日：2015-07-31

    Applicant: Futurewei Technologies, Inc.

    Inventor： Jiachen Xue ,  Chen Tian ,  Feng Ye ,  Zongfang Lin

    IPC: G06F9/50

    CPC classification number: G06F9/505 ,  G06F2209/5018 ,  G06F2209/509

    Abstract: An apparatus, method, and computer program product are provided for utilizing secondary threads to assist primary threads in performing application tasks. In use, a plurality of primary threads are utilized for performing at least one of a plurality of tasks of an application utilizing at least one corresponding core. Further, it is determined whether the primary threads require assistance in performing one or more of the plurality of tasks of the application. Based on such determination, a plurality of secondary threads are utilized for performing the one or more of the plurality of tasks of the application.

    Abstract translation: 提供了一种装置，方法和计算机程序产品，用于利用辅助线程来辅助主线程执行应用任务。 在使用中，使用多个主线程来利用至少一个对应的核来执行应用的多个任务中的至少一个。 此外，确定主线程是否需要协助执行应用的多个任务中的一个或多个。 基于这样的确定，使用多个辅助线程来执行应用的多个任务中的一个或多个。

    Automatically Detecting Time-Of-Fault Bugs in Cloud Systems
    3.
    发明申请
    Automatically Detecting Time-Of-Fault Bugs in Cloud Systems 审中-公开

    公开(公告)号：US20190303233A1

    公开(公告)日：2019-10-03

    申请号：US15938841

    申请日：2018-03-28

    Applicant: Futurewei Technologies, Inc.

    Inventor： Haopeng Liu ,  Xu Wang ,  Guangpu Li ,  Shan Lu ,  Feng Ye ,  Chen Tian ,  Shen Chi Chen

    IPC: G06F11/07 ,  G06F11/14 ,  G06F11/34 ,  G06F21/57 ,  G06F17/30

    Abstract: A method implemented by a network element (NE) in a distributed system, the method comprising tracing an execution of a program in the distributed system to produce a record of the execution of the program, wherein the record indicates states of shared resources at various times during the execution of the program, identifying a vulnerable operation that occurred during the program execution based on the record, wherein the record indicates that a first shared resource of the shared resources is in a flawed state after a node that caused the first shared resource to be in the flawed state crashed, and determining that the vulnerable operation results in a time of fault (TOF) bug based on performing a fault-tolerance mechanism.

    System and method for multithreaded processing
    4.
    发明授权
    System and method for multithreaded processing 有权

    公开(公告)号：US10176014B2

    公开(公告)日：2019-01-08

    申请号：US14810205

    申请日：2015-07-27

    Applicant: Futurewei Technologies, Inc.

    Inventor： Liya Chen ,  Chen Tian ,  Feng Ye ,  Ziang Hu

    IPC: G06F9/46 ,  G06F9/50 ,  G06F9/48

    Abstract: A method for operating a multithread processing system is provided, including assigning, by a controller, a subset of a plurality of tasks to a plurality of threads during a time N, collecting, by the controller, data during the time N concerning the operation of the plurality of threads, analyzing, by the controller, the data to determine at least one condition concerning the operation of the plurality of threads during the time N, and adjusting, by the controller, a number of the plurality of threads available in time N+1 in accordance with the at least one condition.

    Model Checker for Finding Distributed Concurrency Bugs
    6.
    发明申请
    Model Checker for Finding Distributed Concurrency Bugs 审中-公开

    公开(公告)号：US20190332518A1

    公开(公告)日：2019-10-31

    申请号：US15962873

    申请日：2018-04-25

    Applicant: Futurewei Technologies, Inc. ,  University of Chicago

    Inventor： Jeffrey Lukman ,  Huan Ke ,  Haryadi Gunawi ,  Feng Ye ,  Chen Tian ,  Shen Chi Chen

    IPC: G06F11/36

    Abstract: Described herein are systems and methods for distributed concurrency (DC) bug detection. The method includes identifying a plurality of nodes in a distributed computing cluster; identifying a plurality of messages to be transmitted during execution of an application by the distributed computing cluster; determining a set of orderings of the plurality of messages for DC bug detection, the set of orderings determined based upon the plurality of nodes and the plurality of messages; removing a subset of the orderings from the set of orderings based upon one or more of a state symmetry algorithm, a disjoint-update independence algorithm, or a zero-crash-impact reordering algorithm; and performing DC bug detection testing using the set of orderings after the subset of the orderings is removed from the set of orderings.

    Model checker for finding distributed concurrency bugs
    9.
    发明授权
    Model checker for finding distributed concurrency bugs 有权

    公开(公告)号：US10599552B2

    公开(公告)日：2020-03-24

    申请号：US15962873

    申请日：2018-04-25

    Applicant: Futurewei Technologies, Inc. ,  University of Chicago

    Inventor： Jeffrey Lukman ,  Huan Ke ,  Haryadi Gunawi ,  Feng Ye ,  Chen Tian ,  Shen Chi Chen

    IPC: G06F11/36

    Abstract: Described herein are systems and methods for distributed concurrency (DC) bug detection. The method includes identifying a plurality of nodes in a distributed computing cluster; identifying a plurality of messages to be transmitted during execution of an application by the distributed computing cluster; determining a set of orderings of the plurality of messages for DC bug detection, the set of orderings determined based upon the plurality of nodes and the plurality of messages; removing a subset of the orderings from the set of orderings based upon one or more of a state symmetry algorithm, a disjoint-update independence algorithm, or a zero-crash-impact reordering algorithm; and performing DC bug detection testing using the set of orderings after the subset of the orderings is removed from the set of orderings.

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