公开(公告)号：US20240413234A1

公开(公告)日：2024-12-12

申请号：US18331071

申请日：2023-06-07

Applicant: GAN SYSTEMS INC.

Inventor： Marco A. ZUNIGA ,  Thomas William MACELWEE ,  Vineet UNNI ,  Claudio Andres CANIZARES

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/417 ,  H03K17/687

Abstract: A transistor structure that includes multiple heterojunction layer sets, each generating a two-dimensional electron gas (2DEG), such that the transistor structure has a stack of 2DEGs that may be used to conduct between source and drain. A terminal is provided proximate an uppermost 2DEG to control whether the uppermost 2DEG is continuous between a source contact and a source plug. A source plug connects the uppermost 2DEG with the next 2DEG, and a drain plug also connects the uppermost 2DEG with the next 2DEG. Thus, the gate terminal may control the flow of current in sub-surface 2DEGs between the source and drain.