公开(公告)号：US20210066503A1

公开(公告)日：2021-03-04

申请号：US16551794

申请日：2019-08-27

Applicant: GLOBALFOUNDRIES INC.

Inventor： Anupam Dutta ,  Balaji Swaminathan

IPC: H01L29/786 ,  H01L27/12 ,  G01R31/26 ,  H01L29/10 ,  G06F17/50

Abstract: Test structures for a body-contacted field effect transistor (BCFET) include: a single-pad structure with body contact and probe pad regions connected to a channel region at first and second connection points with a known separation distance between the connection points; and a multi-pad structure with a body contact region connected to a channel region at a first connection point and multiple probe pad regions connected to the channel region at second connection points that are separated from the first connection point by different separation distances. A method includes: determining separation distance-dependent internal body potentials at the second connection points in response to different bias conditions by using either multiple single-pad structures, each having a different separation distance between the connection points, or by using a multi-pad structure; and based on the separation distance-dependent internal body potentials, generating a model representing the BCFET with body-contacted and floating body devices.

公开(公告)号：US10665667B2

公开(公告)日：2020-05-26

申请号：US16103357

申请日：2018-08-14

Applicant: GLOBALFOUNDRIES INC.

Inventor： Anupam Dutta ,  John J. Ellis-Monaghan

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/66

Abstract: The present disclosure relates to a semiconductor device, and more particularly, to a junctionless/accumulation mode transistor with dynamic control and method of manufacturing. The circuit includes a channel region and a threshold voltage control on at least one side of the channel region, the threshold voltage control being configured to provide dynamic control of a voltage threshold, leakage current, and breakdown voltage of the circuit, wherein the threshold voltage control is a different dopant or material of a source region and a drain region of the circuit.

公开(公告)号：US20190163853A1

公开(公告)日：2019-05-30

申请号：US15822661

申请日：2017-11-27

Applicant: GLOBALFOUNDRIES INC.

Inventor： Anupam Dutta ,  Tamilmani Ethirajan

IPC: G06F17/50

Abstract: A simulation circuit, that simulates characteristics of transistors is produced to include: an isolation body resistor representing resistance of a channel isolation portion of a transistor; a main body resistor representing resistance of main channel portion of the transistor; an isolation transistor connected to the isolation body resistor; and a body-contact transistor connected to the main body resistor. Simulated data is generated by supplying test inputs to the simulation circuit, while selectively activating either the isolation transistor or the body-contact transistor. Test data is generated by supplying the test inputs to the transistors, and measuring output of the transistors. The simulated data is compared to the test data to identify data differences. The design of the transistors is changed to reduce the data differences. The generation of test data, comparing, and design changes are repeated, until the data differences are within a threshold.