公开(公告)号：US09461111B2

公开(公告)日：2016-10-04

申请号：US14822345

申请日：2015-08-10

Applicant: GLOBALFOUNDRIES INC.

Inventor： InSoo Jung ,  Wonwoo Kim

IPC: H01L27/01 ,  H01L29/06 ,  H01L21/308 ,  H01L21/02 ,  H01L29/78 ,  H01L29/161 ,  H01L29/66

CPC classification number: H01L29/0657 ,  H01L21/02532 ,  H01L21/3081 ,  H01L29/161 ,  H01L29/66795 ,  H01L29/785

Abstract: A method of forming double and/or multiple numbers of fins of a FinFET device using a Si/SiGe selective epitaxial growth process and the resulting device are provided. Embodiments include forming a Si pillar in an oxide layer, the Si pillar having a bottom portion and a top portion; removing the top portion of the Si pillar; forming a SiGe pillar on the bottom portion of the Si pillar; reducing the SiGe pillar; forming a first set of Si fins on opposite sides of the reduced SiGe pillar; removing the SiGe pillar; replacing the Si fins with SiGe fins; reducing the SiGe fins; forming a second set of Si fins on opposite sides of the SiGe fins; and removing the SiGe fins.

公开(公告)号：US09142418B1

公开(公告)日：2015-09-22

申请号：US14281726

申请日：2014-05-19

Applicant: GLOBALFOUNDRIES INC.

Inventor： InSoo Jung ,  Wonwoo Kim

IPC: H01L21/00 ,  H01L21/308 ,  H01L21/02 ,  H01L29/06 ,  H01L29/78

CPC classification number: H01L29/0657 ,  H01L21/02532 ,  H01L21/3081 ,  H01L29/161 ,  H01L29/66795 ,  H01L29/785

Abstract: A method of forming double and/or multiple numbers of fins of a FinFET device using a Si/SiGe selective epitaxial growth process and the resulting device are provided. Embodiments include forming a Si pillar in an oxide layer, the Si pillar having a bottom portion and a top portion; removing the top portion of the Si pillar; forming a SiGe pillar on the bottom portion of the Si pillar; reducing the SiGe pillar; forming a first set of Si fins on opposite sides of the reduced SiGe pillar; removing the SiGe pillar; replacing the Si fins with SiGe fins; reducing the SiGe fins; forming a second set of Si fins on opposite sides of the SiGe fins; and removing the SiGe fins.

Abstract translation: 提供了使用Si / SiGe选择性外延生长工艺形成FinFET器件的双重和/或多个鳍片的方法和所得到的器件。 实施例包括在氧化物层中形成Si柱，Si柱具有底部和顶部; 去除Si柱的顶部; 在Si柱的底部形成SiGe柱; 减少SiGe支柱; 在所述还原SiGe柱的相对侧上形成第一组Si散热片; 去除SiGe支柱; 用SiGe翅片代替Si翅片; 减少SiGe散热片; 在SiGe翅片的相对侧上形成第二组Si翅片; 并去除SiGe散热片。