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公开(公告)号：US10386406B1
公开(公告)日：2019-08-20
申请号：US15887417
申请日：2018-02-02
Applicant: GLOBALFOUNDRIES INC.
Inventor： Michael Otto , Jan Höntschel , Maximilian Jüttner
Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to back gate tuning circuits and methods of manufacture. The method includes applying a voltage to a back gate of a device; and selectively controlling the applied voltage to deactivate at least one trap within an insulating layer of the device to reduce noise contribution from the at least one trap.
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