公开(公告)号：US08871586B2

公开(公告)日：2014-10-28

申请号：US13654849

申请日：2012-10-18

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Thilo Scheiper ,  Jan Hoentschel ,  Markus Lenski ,  Rolf Stephan

IPC: H01L21/8234

CPC classification number: H01L21/823878 ,  H01L21/76224 ,  H01L21/823807 ,  Y02P80/30

Abstract: In one example, the method includes forming a plurality of isolation structures in a semiconducting substrate that define first and second active regions where first and second transistor devices, respectively, will be formed, forming a hard mask layer on a surface of the substrate above the first and second active regions, wherein the hard mask layer comprises at least one of carbon, fluorine, xenon or germanium ions, performing a first etching process to remove a portion of the hard mask layer and expose a surface of one of the first and second active regions, after performing the first etching process, forming a channel semiconductor material on the surface of the active region that was exposed by the first etching process, and after forming the channel semiconductor material, performing a second etching process to remove remaining portions of the hard mask layer that were not removed during the first etching process.

Abstract translation: 在一个示例中，该方法包括在半导体衬底中形成多个隔离结构，其限定第一和第二有源区，其中将分别形成第一和第二晶体管器件，在衬底的表面上形成硬掩模层， 第一和第二有源区，其中所述硬掩模层包括碳，氟，氙或锗离子中的至少一种，执行第一蚀刻工艺以去除所述硬掩模层的一部分并暴露所述第一和第二有源区中的一个的表面 活性区域，在进行第一蚀刻工艺之后，在通过第一蚀刻工艺曝光的有源区的表面上形成沟道半导体材料，并且在形成沟道半导体材料之后，执行第二蚀刻工艺以除去 硬掩模层，其在第一蚀刻工艺期间未被除去。

公开(公告)号：US20140113419A1

公开(公告)日：2014-04-24

申请号：US13654849

申请日：2012-10-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： Thilo Scheiper ,  Jan Hoentschel ,  Markus Lenski ,  Rolf Stephan

IPC: H01L21/762 ,  H01L21/8238

CPC classification number: H01L21/823878 ,  H01L21/76224 ,  H01L21/823807 ,  Y02P80/30

Abstract: In one example, the method includes forming a plurality of isolation structures in a semiconducting substrate that define first and second active regions where first and second transistor devices, respectively, will be formed, forming a hard mask layer on a surface of the substrate above the first and second active regions, wherein the hard mask layer comprises at least one of carbon, fluorine, xenon or germanium ions, performing a first etching process to remove a portion of the hard mask layer and expose a surface of one of the first and second active regions, after performing the first etching process, forming a channel semiconductor material on the surface of the active region that was exposed by the first etching process, and after forming the channel semiconductor material, performing a second etching process to remove remaining portions of the hard mask layer that were not removed during the first etching process.

Abstract translation: 在一个示例中，该方法包括在半导体衬底中形成多个隔离结构，其限定第一和第二有源区，其中将分别形成第一和第二晶体管器件，在衬底的表面上形成硬掩模层， 第一和第二有源区，其中所述硬掩模层包括碳，氟，氙或锗离子中的至少一种，执行第一蚀刻工艺以去除所述硬掩模层的一部分并暴露所述第一和第二有源区中的一个的表面 活性区域，在进行第一蚀刻工艺之后，在通过第一蚀刻工艺曝光的有源区的表面上形成沟道半导体材料，并且在形成沟道半导体材料之后，执行第二蚀刻工艺以除去 硬掩模层，其在第一蚀刻工艺期间未被除去。