公开(公告)号：US20170221882A1

公开(公告)日：2017-08-03

申请号：US15013411

申请日：2016-02-02

Applicant: GLOBALFOUNDRIES INC.

Inventor： Ananth Sundaram ,  Balaji Swaminathan ,  Srikumar Konduru ,  Alvin Joseph ,  Michael Zierak

IPC: H01L27/088 ,  H01L21/8234 ,  H01L23/528

CPC classification number: H01L27/088 ,  H01L21/823418 ,  H01L21/823475 ,  H01L23/522 ,  H01L23/528 ,  H01L27/0207

Abstract: Chip structures having wiring coupled with the device structures of a high frequency switch and methods for fabricating such chip structures. A transistor is formed that includes a first source/drain region, a second source/drain region, and a first gate electrode having a first width aligned in a first direction. A wiring level is formed that includes a wire coupled with the first source/drain region. The wire has a length aligned in a second direction that is different from the first direction.

公开(公告)号：US09721948B1

公开(公告)日：2017-08-01

申请号：US15013411

申请日：2016-02-02

Applicant: GLOBALFOUNDRIES INC.

Inventor： Ananth Sundaram ,  Balaji Swaminathan ,  Srikumar Konduru ,  Alvin Joseph ,  Michael Zierak

IPC: H01L27/088 ,  H01L23/528 ,  H01L21/8234

CPC classification number: H01L27/088 ,  H01L21/823418 ,  H01L21/823475 ,  H01L23/522 ,  H01L23/528 ,  H01L27/0207

Abstract: Chip structures having wiring coupled with the device structures of a high frequency switch and methods for fabricating such chip structures. A transistor is formed that includes a first source/drain region, a second source/drain region, and a first gate electrode having a first width aligned in a first direction. A wiring level is formed that includes a wire coupled with the first source/drain region. The wire has a length aligned in a second direction that is different from the first direction.