公开(公告)号：US20180218991A1

公开(公告)日：2018-08-02

申请号：US15420362

申请日：2017-01-31

Applicant: GLOBALFOUNDRIES INC.

Inventor： Mukta G. Farooq ,  Tanya A. Atanasova

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L24/11 ,  H01L2224/11013 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/014

Abstract: The disclosure is directed to an integrated circuit structure for joining wafers and methods of forming same. The IC structure may include: a metallic pillar over a substrate, the metallic pillar including an upper surface; a wetting inhibitor layer about a periphery of the upper surface of the metallic pillar; and a solder material over the upper surface of the metallic pillar, the solder material being within and constrained by the wetting inhibitor layer. The sidewall of the metallic pillar may be free of the solder material. The method may include: forming a metallic pillar over a substrate, the metallic pillar having an upper surface; forming a wetting inhibitor layer about a periphery of the upper surface of the metallic pillar; and forming a solder material over the upper surface of the metallic pillar within and constrained by the wetting inhibitor layer.

公开(公告)号：US10103119B2

公开(公告)日：2018-10-16

申请号：US15420362

申请日：2017-01-31

Applicant: GLOBALFOUNDRIES INC.

Inventor： Mukta G. Farooq ,  Tanya A. Atanasova

IPC: H01L23/00

Abstract: The disclosure is directed to an integrated circuit structure for joining wafers and methods of forming same. The IC structure may include: a metallic pillar over a substrate, the metallic pillar including an upper surface; a wetting inhibitor layer about a periphery of the upper surface of the metallic pillar; and a solder material over the upper surface of the metallic pillar, the solder material being within and constrained by the wetting inhibitor layer. The sidewall of the metallic pillar may be free of the solder material. The method may include: forming a metallic pillar over a substrate, the metallic pillar having an upper surface; forming a wetting inhibitor layer about a periphery of the upper surface of the metallic pillar; and forming a solder material over the upper surface of the metallic pillar within and constrained by the wetting inhibitor layer.

公开(公告)号：US20200066667A1

公开(公告)日：2020-02-27

申请号：US16106239

申请日：2018-08-21

Applicant: GLOBALFOUNDRIES INC.

Inventor： Mukta G. Farooq ,  Tanya A. Atanasova

IPC: H01L23/00

Abstract: The disclosure is directed to an integrated circuit structure for joining wafers. The IC structure may include: a metallic pillar over a substrate, the metallic pillar including an upper surface; a wetting inhibitor layer about a periphery of the upper surface of the metallic pillar; and a solder material over the upper surface of the metallic pillar, the solder material being within and constrained by the wetting inhibitor layer. The sidewall of the metallic pillar may be free of the solder material.