Nanowire structure with selected stack removed for reduced gate resistance and method of fabricating same
    1.
    发明授权
    Nanowire structure with selected stack removed for reduced gate resistance and method of fabricating same 有权
    选择的叠层的纳米线结构被去除以降低栅极电阻及其制造方法

    公开(公告)号:US09461149B2

    公开(公告)日:2016-10-04

    申请号:US14484916

    申请日:2014-09-12

    Abstract: Methods to fabricate a stacked nanowire field effect transistor (FET) with reduced gate resistance are provided. The nanowire stack in the stacked nanowire FET can be provided by first forming a material stack of alternating sacrificial material layers and nanowire material layer. The sacrificial material layers and selected nanowire material layers in the material stack are subsequently removed to increase a vertical distance between two active nanowire material layers.

    Abstract translation: 提供了制造具有降低的栅极电阻的堆叠的纳米线场效应晶体管(FET)的方法。 可以通过首先形成交替的牺牲材料层和纳米线材料层的材料堆叠来提供堆叠的纳米线FET中的纳米线堆叠。 随后去除材料堆叠中的牺牲材料层和选定的纳米线材料层以增加两个活性纳米线材料层之间的垂直距离。

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