公开(公告)号：US09972721B1

公开(公告)日：2018-05-15

申请号：US15337368

申请日：2016-10-28

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Marcel Richter ,  Ardechir Pakfar ,  Armin Muehlhoff

IPC: H01L21/336 ,  H01L29/786 ,  H01L29/08 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L29/78654 ,  H01L27/1203 ,  H01L29/0847 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/66772

Abstract: A method of forming a semiconductor device is disclosed including providing a semiconductor-on-insulator substrate comprising a semiconductor bulk substrate, a buried insulating layer positioned on the semiconductor bulk substrate and a semiconductor layer positioned on the buried insulating layer, providing at least one metal-oxide semiconductor gate structure positioned above the semiconductor layer comprising a gate electrode and a spacer formed adjacent to the gate electrode, selectively removing an upper portion of the semiconductor layer so as to define recessed portions of the semiconductor layer and epitaxially forming raised source/drain regions on the recessed portions of the semiconductor layer.

公开(公告)号：US20180122956A1

公开(公告)日：2018-05-03

申请号：US15337368

申请日：2016-10-28

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Marcel Richter ,  Ardechir Pakfar ,  Armin Muehlhoff

IPC: H01L29/786 ,  H01L29/08 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L29/78654 ,  H01L27/1203 ,  H01L29/0847 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/66772

Abstract: A method of forming a semiconductor device is disclosed including providing a semiconductor-on-insulator substrate comprising a semiconductor bulk substrate, a buried insulating layer positioned on the semiconductor bulk substrate and a semiconductor layer positioned on the buried insulating layer, providing at least one metal-oxide semiconductor gate structure positioned above the semiconductor layer comprising a gate electrode and a spacer formed adjacent to the gate electrode, selectively removing an upper portion of the semiconductor layer so as to define recessed portions of the semiconductor layer and epitaxially forming raised source/drain regions on the recessed portions of the semiconductor layer.