公开(公告)号：US20190181042A1

公开(公告)日：2019-06-13

申请号：US15837671

申请日：2017-12-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ruilong Xie ,  Lars W. Liebmann ,  Balasubramanian Pranatharthi Haran ,  Veeraraghavan Basker

IPC: H01L21/768 ,  H01L21/321

Abstract: One illustrative method disclosed includes, among other things, forming at least one layer of sacrificial material above an underlying conductive structure, forming a sacrificial contact structure in the at least one layer of sacrificial material and forming at least one layer of insulating material around the sacrificial contact structure. In this example, the method also includes performing at least one process operation to expose an upper surface of the sacrificial contact structure, removing the sacrificial contact structure so as to form a contact opening that exposes the upper surface of the underlying conductive structure and forming a final contact structure in the contact opening, the final contact structure conductively contacting the underlying conductive structure.

公开(公告)号：US20200020575A1

公开(公告)日：2020-01-16

申请号：US16579035

申请日：2019-09-23

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ruilong Xie ,  Lars W. Liebmann ,  Balasubramanian Pranatharthi Haran ,  Veeraraghavan Basker

IPC: H01L21/768 ,  H01L21/321

Abstract: One illustrative transistor device disclosed herein includes a gate structure positioned above at least an active region, wherein the gate structure has an axial length in a direction corresponding to a gate width direction of the transistor device. In this example, a first portion of the axial length of the gate structure has a first upper surface and a second portion of the axial length of the gate structure has a second upper surface, wherein the first upper surface is positioned at a level that is above a level of the second upper surface. The device also includes a gate contact structure that contacts the first upper surface of the gate structure.