公开(公告)号：US20180254331A1

公开(公告)日：2018-09-06

申请号：US15447210

申请日：2017-03-02

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ruilong Xie ,  Zhenxing Bi ,  Pietro Montanini ,  Eric R. Miller ,  Balasubramanian Pranatharthiharan ,  Oleg Gluschenkov ,  Ruqiang Bao ,  Kangguo Cheng

IPC: H01L29/66 ,  H01L21/3105

CPC classification number: H01L29/66795 ,  H01L21/3105 ,  H01L21/31053 ,  H01L29/6656

Abstract: The disclosure relates to methods of forming etch-resistant spacers in an integrated circuit (IC) structure. Methods according to the disclosure can include: forming a mask on an upper surface of a gate structure positioned over a substrate; forming a spacer material on the substrate, the mask, and exposed sidewalls of the gate structure; forming a separation layer over the substrate and laterally abutting the spacer material to a predetermined height, such that an exposed portion of the spacer material is positioned above an upper surface of the separation layer and at least partially in contact with the mask; and implanting a dopant into the exposed portion of the spacer material to yield a dopant-implanted region within the spacer material, wherein the dopant-implanted region of the spacer material has a greater etch resistivity than a remainder of the spacer material.

公开(公告)号：US10109722B2

公开(公告)日：2018-10-23

申请号：US15447210

申请日：2017-03-02

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ruilong Xie ,  Zhenxing Bi ,  Pietro Montanini ,  Eric R. Miller ,  Balasubramanian Pranatharthiharan ,  Oleg Gluschenkov ,  Ruqiang Bao ,  Kangguo Cheng

IPC: H01L21/336 ,  H01L29/66 ,  H01L21/3105

Abstract: The disclosure relates to methods of forming etch-resistant spacers in an integrated circuit (IC) structure. Methods according to the disclosure can include: forming a mask on an upper surface of a gate structure positioned over a substrate; forming a spacer material on the substrate, the mask, and exposed sidewalls of the gate structure; forming a separation layer over the substrate and laterally abutting the spacer material to a predetermined height, such that an exposed portion of the spacer material is positioned above an upper surface of the separation layer and at least partially in contact with the mask; and implanting a dopant into the exposed portion of the spacer material to yield a dopant-implanted region within the spacer material, wherein the dopant-implanted region of the spacer material has a greater etch resistivity than a remainder of the spacer material.