公开(公告)号：US20160064371A1

公开(公告)日：2016-03-03

申请号：US14471712

申请日：2014-08-28

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jian-Hsing LEE ,  Jagar SINGH ,  Manjunatha PRABHU ,  Anil KUMAR ,  Mahadeva Iyer NATARAJAN ,  Min-hwa CHI

IPC: H01L27/02 ,  H01L21/8249 ,  H01L27/06

CPC classification number: H01L27/0259

Abstract: Protecting non-planar output transistors from electrostatic discharge (ESD) events includes providing a non-planar semiconductor structure, the structure including a semiconductor substrate with a well of n-type or p-type. The provided non-planar structure further includes raised semiconductor structure(s) coupled to the substrate, non-planar transistor(s) of a type opposite the well, each transistor being situated on one of the raised structure(s), the non-planar transistor(s) each including a source, a drain and a gate, the non-planar structure further including parasitic bipolar junction transistor(s) (BJT(s)) on the raised structure(s), each BJT including a collector and an emitter situated on the raised structure and a base being the well, and a well contact for the base of the BJT. Protecting the non-planar output transistors further includes electrically coupling the drain of the non-planar transistor and the collector of the BJT to an output of a circuit, and electrically coupling the source of the non-planar transistor, the emitter of the BJT and the well contact to a ground of the circuit.

Abstract translation: 保护非平面输出晶体管免受静电放电（ESD）事件包括提供非平面半导体结构，该结构包括具有n型或p型阱的半导体衬底。 提供的非平面结构还包括耦合到衬底的凸起的半导体结构，与阱相对的类型的非平面晶体管，每个晶体管位于凸起结构中的一个上， 每个包括源极，漏极和栅极的平面晶体管，非平面结构还包括在凸起结构上的寄生双极结晶体管（BJT（s）），每个BJT包括集电极和 位于凸起结构上的发射器和作为阱的基座，以及用于BJT的基座的阱接触。 保护非平面输出晶体管还包括将非平面晶体管的漏极和BJT的集电极电耦合到电路的输出，并且将非平面晶体管的源极，BJT的发射极和 接触到电路的地面。