公开(公告)号：US09123787B2

公开(公告)日：2015-09-01

申请号：US14028729

申请日：2013-09-17

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Himani S. Kamineni ,  Ramakanth Alapati ,  Maria Balicka

IPC: H01L21/768 ,  H01L23/498 ,  G06F17/50

CPC classification number: H01L21/76897 ,  G06F17/5077 ,  H01L23/481 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Exemplary embodiments of the present invention provide a V0 via unit cell with multiple keep out zones. The keep out zones are oriented concentrically and provide support for multiple sizes of through-silicon vias (TSVs). An off-center alignment between the V0 via unit cell and a probe pad is used to improve contact between the V0 vias and a probe pad. During a chip redesign, the TSV size may be changed without the need to revise the V0 mask.

Abstract translation: 本发明的示例性实施例提供具有多个保持区的V0通孔单元。 保留区域同心取向，并提供对多种尺寸的通硅通孔（TSV）的支持。 使用V0通孔单元和探针焊盘之间的偏心对准来改善V0通孔和探针焊盘之间的接触。 在重新设计芯片期间，可以改变TSV大小，而无需修改V0掩码。