公开(公告)号：US10234500B2

公开(公告)日：2019-03-19

申请号：US14689088

申请日：2015-04-17

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Weihong Gao ,  Xuefeng Zeng ,  Yan Pan ,  Peter Lin ,  Hoang Nguyen ,  Ho Young Song

IPC: G01R31/04 ,  G01R31/305

Abstract: A method and apparatus for separating real DVC via defects from nuisance based on Net Tracing Classification of eBeam VC die comparison inspection results are provided. Embodiments include performing an eBeam VC die comparison inspection on each via of a plurality of dies; determining DVC vias based on the comparison; performing a Net Tracing Classification on the DVC vias; determining S/D DVC vias based on the Net Tracing Classification; and performing a die repeater analysis on the S/D DVC vias to determine systematic design-related DVC via defects.

公开(公告)号：US10649026B2

公开(公告)日：2020-05-12

申请号：US15474104

申请日：2017-03-30

Applicant: GLOBALFOUNDRIES INC.

Inventor： Oliver D. Patterson ,  Peter Lin ,  Weihong Gao

IPC: G01R31/28 ,  G01R31/307 ,  H01L21/66

Abstract: A method in which connectivity tests of integrated circuit structures in a die are performed. The connectivity tests are performed at a first level of the die. Potential defect locations are identified in the die indicating via locations susceptible to systematic failure due to via opens or via shorts. The potential defect locations are translated to via locations for a second level of the die. The second level is below the first level. After translating the hot spot, the second level is inspected for defects. The via locations on the first level are inspected for defects. All defects for the second level are translated to the via locations for the first level. A net trace of defects is created using prior level subtraction of the translated defects for the second level and the defects for the first level.