公开(公告)号：US20170268941A1

公开(公告)日：2017-09-21

申请号：US15075886

申请日：2016-03-21

Applicant: GLOBALFOUNDRIES INC.

Inventor： Robert Boyd Finlay

IPC: G01L1/16 ,  H01L21/67

CPC classification number: H01L21/67253 ,  G01L1/16 ,  G01L5/0076

Abstract: We disclose a tactile sensing instrumented wafer, which may comprise a substrate; and at least one tactile sensor array disposed on a top surface of the substrate. The at least one tactile sensor array may comprise carbon nanotubes or a piezoelectric transducer. In further embodiments, the instrumented wafer may further comprise a power supply; a memory; a communications interface; and a controller. An instrumented wafer in accordance with embodiments herein may detect both downforce and lateral forces impinging on the wafer, and may be used in a semiconductor device manufacturing system.

公开(公告)号：US10109046B2

公开(公告)日：2018-10-23

申请号：US15213665

申请日：2016-07-19

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Robert Boyd Finlay ,  Yunsheng Song

IPC: G06T7/00 ,  G06T7/60 ,  G06K9/52 ,  G06K9/62 ,  G06T7/20

Abstract: Systems for and methods of detecting faults in semiconductor wafers are provided. One method includes, for instance: monitoring, with at least one sensor, a recipe for manufacturing a semiconductor wafer; tracking, with a fault detection system, a set of steps for the recipe; determining a start of a step; sensing a set of data related to at least one parameter of the step; generating, by an imaging system, an image of the set of data; displaying, on a display, the image of the set of data; calculating, by the fault detection system, a pixel area ratio from the image of the set of data; determining if a fault exists in the wafer based upon the pixel area ratio; and displaying, on the display, an indication of the fault during real-time and at an end of the step.

公开(公告)号：US20190109029A1

公开(公告)日：2019-04-11

申请号：US15726359

申请日：2017-10-05

Applicant: GLOBALFOUNDRIES INC.

Inventor： Eyup Cinar ,  Robert Boyd Finlay ,  Patrick Leonard Minton

IPC: H01L21/67 ,  H01L21/02 ,  G05B13/02 ,  H01L21/66 ,  G05B19/418

Abstract: At least one method, apparatus and system disclosed herein involves performing a wafer to wafer feedback control of process performed on a semiconductor substrate. A first process on a first semiconductor wafer of a run of semiconductor wafers is performed using a processing tool. A first gas analysis of a gas in the processing tool is performed upon performing the first process. Determining a process feedback adjustment based upon a result of the first gas analysis. Data relating to the process feedback adjustment is provided. Performing a second process on a second semiconductor wafer based on the data relating to the process feedback adjustment.