公开(公告)号：US20180204929A1

公开(公告)日：2018-07-19

申请号：US15407407

申请日：2017-01-17

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Shiv K. Mishra ,  Sunil K. Singh

IPC: H01L29/66 ,  H01L21/321 ,  H01L21/283 ,  H01L21/768 ,  H01L21/324 ,  H01L21/762 ,  H01L29/49

CPC classification number: H01L29/4966 ,  H01L21/28088 ,  H01L21/76224 ,  H01L29/165 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/78

Abstract: Structures for a field-effect transistor and methods for forming a field-effect transistor. An interlayer dielectric layer is formed on a substrate. An energy removal film is formed on the interlayer dielectric layer, and at least one metal gate layer is formed on the energy removal film. After the at least one metal gate layer is polished, the energy removal film is removed from the interlayer dielectric layer. The removal of the energy removal film may remove metal residues generated by the polishing of the at least one metal gate layer so that the top surface of the interlayer dielectric layer is not contaminated by the metal residues.