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公开(公告)号:US20150221663A1
公开(公告)日:2015-08-06
申请号:US14684305
申请日:2015-04-10
发明人: Shyue Seng TAN , Yuan SUN
IPC分类号: H01L27/115 , H01L29/66 , H01L21/28 , H01L49/02 , H01L29/06 , H01L29/10 , H01L29/788 , H01L29/423
CPC分类号: H01L29/42328 , G11C16/0433 , H01L27/11558 , H01L29/42324 , H01L29/66825 , H01L29/7881 , H01L29/7883 , H01L29/7885
摘要: Embodiments of a simple and cost-free multi-time programmable (MTP) structure for non-volatile memory cells are presented. The memory cell includes a substrate, a first transistor having a select gate and a second transistor having a floating gate. The select and floating gates are adjacent to one another and disposed over a transistor well. The transistors include first and second S/D regions disposed adjacent to the sides of the gates. A control gate is disposed over a control well. The control gate is coupled to the floating gate and includes a control capacitor. An erase terminal is decoupled from the control capacitor and transistors.
摘要翻译: 提出了一种用于非易失性存储单元的简单且无成本的多时间可编程(MTP)结构的实施例。 存储单元包括衬底,具有选择栅极的第一晶体管和具有浮置栅极的第二晶体管。 选择和浮置栅极彼此相邻并且设置在晶体管阱上。 晶体管包括邻近栅极侧面设置的第一和第二S / D区域。 控制门设置在控制井上。 控制栅极耦合到浮动栅极并且包括控制电容器。 擦除端子与控制电容和晶体管分离。