公开(公告)号：US20210090627A1

公开(公告)日：2021-03-25

申请号：US16582474

申请日：2019-09-25

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Anuj GUPTA ,  Bipul C. PAUL ,  Joseph VERSAGGI

IPC: G11C11/16

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to twisted wordline structures and methods of manufacture. The memory array structure includes: a plurality of bitcells comprising memory elements and access transistors; a plurality of bitlines and wordlines which interconnect the bitcells; a plurality of dummy bitcells which intersect with the bitlines and wordlines; and a plurality of twisted wordline strap cells which twist wordlines in the dummy bitcells and connect a higher metal layer in the bitcells to a gate structure of the access transistor.