公开(公告)号：US11233137B2

公开(公告)日：2022-01-25

申请号：US16789936

申请日：2020-02-13

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Dominic J. Schepis ,  Alexander Reznicek

IPC: H01L29/66 ,  H01L29/49 ,  H01L29/78 ,  H01L29/06 ,  H01L29/786 ,  H01L29/423 ,  H01L29/51

Abstract: Devices and methods of fabricating vertical nanowires on semiconductor devices. A doped silicon substrate, a first insulator over the doped silicon substrate, a gate conductor over the first insulator, and a second insulator over the gate conductor. Silicon nanowires extend from the top surface of the substrate through the first insulator, the gate conductor, and the second insulator. A first contact extends from the gate conductor through the second insulator, a second contact extends from the substrate through the first insulator, the gate conductor, and the second insulator layer, and an insulating spacer material is positioned between the second contact and the gate conductor.

公开(公告)号：US11069809B2

公开(公告)日：2021-07-20

申请号：US15884045

申请日：2018-01-30

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Alexander Reznicek ,  Shogo Mochizuki ,  Veeraraghavan S. Basker ,  Nicolas L. Breil ,  Oleg Gluschenkov

IPC: H01L29/78 ,  H01L29/165 ,  H01L29/66

Abstract: Fabrication method for a semiconductor device and structure are provided, which includes: providing an isolation layer at least partially disposed adjacent to at least one sidewall of a fin structure extended above a substrate structure, the fin structure including a channel region; recessing an exposed portion of the fin structure to define a residual stress to be induced into the channel region of the fin structure, wherein upper surfaces of a recessed fin portion and the isolation layer are coplanar with each other; and epitaxially growing a semiconductor material from the recessed exposed portion of the fin structure to form at least one of a source region and a drain region of the semiconductor device.