公开(公告)号：US20250133735A1

公开(公告)日：2025-04-24

申请号：US18489672

申请日：2023-10-18

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Nicki Nico MIKA ,  Tom Herrmann ,  Thomas Melde

IPC: H10B41/30 ,  H01L21/28 ,  H01L29/423 ,  H01L29/66 ,  H01L29/788

Abstract: A non-volatile memory structure includes a semiconductor substrate and first and second memory devices on the semiconductor substrate. Each of the first and second memory devices includes a floating gate, a tunnelling insulator under the floating gate, an isolation layer over the floating gate, and at least one of a select gate and a control gate over the isolation layer. The non-volatile memory structure further includes an erase gate shared by the first and second memory devices, a source region under the erase gate, and a shallow trench isolation structure between the erase gate and the source region. The shallow trench isolation structure increases the number of write/erase cycles that can be performed by the non-volatile memory structure.