SYSTEM AND METHOD FOR MANAGING SYSTEM MEMORY INTEGRITY IN SUSPENDED ELECTRONIC CONTROL UNITS

    公开(公告)号:US20190188039A1

    公开(公告)日:2019-06-20

    申请号:US15845254

    申请日:2017-12-18

    CPC classification number: G06F15/177 G06F1/24 G06F1/3206 G06F9/5016

    Abstract: A system for controlling a subsystem of a vehicle includes a memory, a first processor, and a second processor. The first processor allocates a portion of the memory upon booting to perform operations to control the subsystem and generates an indication when an amount of memory used from the allocated portion of the memory is greater than or equal to a threshold. The first processor monitors times when the vehicle is turned on and off and determines a time period during which the vehicle remains turned off. After the vehicle is turned off, the first processor enters a power save mode. The memory and the second processor continue to receive power. During the time period, on receiving the indication, the second processor wakes up the first processor, which performs a reboot operation, reallocates the memory, and reenters the power save mode. The memory continues to receive power.

    System and method for managing system memory integrity in suspended electronic control units

    公开(公告)号:US10353858B2

    公开(公告)日:2019-07-16

    申请号:US15845254

    申请日:2017-12-18

    Abstract: A system for controlling a subsystem of a vehicle includes a memory, a first processor, and a second processor. The first processor allocates a portion of the memory upon booting to perform operations to control the subsystem and generates an indication when an amount of memory used from the allocated portion of the memory is greater than or equal to a threshold. The first processor monitors times when the vehicle is turned on and off and determines a time period during which the vehicle remains turned off. After the vehicle is turned off, the first processor enters a power save mode. The memory and the second processor continue to receive power. During the time period, on receiving the indication, the second processor wakes up the first processor, which performs a reboot operation, reallocates the memory, and reenters the power save mode. The memory continues to receive power.

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