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    CDMA power amplifier design for low and high power modes
    1.
    发明授权
    CDMA power amplifier design for low and high power modes 有权
    CDMA功率放大器设计用于低功耗和高功率模式

    公开(公告)号：US07443236B2

    公开(公告)日：2008-10-28

    申请号：US11784541

    申请日：2007-04-06

    申请人： Gee Samuel Dow ,  Jianwen Bao ,  Chun-Wen Paul Huang

    发明人： Gee Samuel Dow ,  Jianwen Bao ,  Chun-Wen Paul Huang

    IPC分类号： H03F1/14

    CPC分类号： H03F1/30 ,  H03F1/14 ,  H03F1/3241 ,  H03F1/56 ,  H03F3/189 ,  H03F3/191 ,  H03F3/60 ,  H03F2200/318 ,  H03F2200/411 ,  H03F2200/75

    摘要： An amplifier circuit responsive to a power mode signal improves efficiency at low power levels without compromising efficiency at high power levels. At low power levels, high impedance is presented with suitable adjustment in the phase of the signal. Also, providing for predistortion linearization improves high power efficiency and switching the predistortion linearizer OFF at low power levels contributes little more than a small insertion loss. The power amplifier also uses a bias circuit incorporating a dual harmonic resonance filter to provide high impedance at a fundamental frequency and low impedance at a second harmonic. These properties are of particularly advantageous since amplifiers in cell-phones are used in low power modes most of the time although they are designed to be most efficient at primarily the highest power levels.

    摘要翻译： 响应于功率模式信号的放大器电路在低功率水平下提高效率，而不会在高功率水平下降低效率。 在低功率电平下，在信号的相位中适当调整高阻抗。 此外，提供预失真线性化提高了高功率效率，并且在低功率电平下切换预失真线性化器关闭仅仅贡献小于小的插入损耗。 功率放大器还使用包含双谐波谐振滤波器的偏置电路，以在基频处提供高阻抗，在二次谐波下提供低阻抗。 这些特性是特别有利的，因为手机中的放大器大部分时间都以低功率模式使用，尽管它们被设计为在主要最高功率水平下是最有效的。

    CDMA power amplifier design for low and high power modes
    2.
    发明授权
    CDMA power amplifier design for low and high power modes 有权
    CDMA功率放大器设计用于低功耗和高功率模式

    公开(公告)号：US07202736B1

    公开(公告)日：2007-04-10

    申请号：US10807764

    申请日：2004-03-23

    申请人： Gee Samuel Dow ,  Jianwen Bao ,  Chun-Wen Paul Huang

    发明人： Gee Samuel Dow ,  Jianwen Bao ,  Chun-Wen Paul Huang

    IPC分类号： H03G3/20 ,  H03F1/14

    CPC分类号： H03F1/30 ,  H03F1/14 ,  H03F1/3241 ,  H03F1/56 ,  H03F3/189 ,  H03F3/191 ,  H03F3/60 ,  H03F2200/318 ,  H03F2200/411 ,  H03F2200/75

    摘要： An amplifier circuit responsive to a power mode signal improves efficiency at low power levels without compromising efficiency at high power levels. At low power levels, high impedance is presented with suitable adjustment in the phase of the signal. Also, providing for predistortion linearization improves high power efficiency and switching the predistortion linearizer OFF at low power levels contributes little more than a small insertion loss. The power amplifier also uses a bias circuit incorporating a dual harmonic resonance filter to provide high impedance at a fundamental frequency and low impedance at a second harmonic. These properties are of particularly advantageous since amplifiers in cell-phones are used in low power modes most of the time although they are designed to be most efficient at primarily the highest power levels.

    摘要翻译： 响应于功率模式信号的放大器电路在低功率水平下提高效率，而不会在高功率水平下降低效率。 在低功率电平下，在信号的相位中适当调整高阻抗。 此外，提供预失真线性化提高了高功率效率，并且在低功率电平下切换预失真线性化器关闭仅仅贡献小于小的插入损耗。 功率放大器还使用包含双谐波谐振滤波器的偏置电路，以在基频处提供高阻抗，在二次谐波下提供低阻抗。 这些特性是特别有利的，因为手机中的放大器大部分时间都以低功率模式使用，尽管它们被设计为在主要最高功率水平下是最有效的。

    CDMA power amplifier design for low and high power modes
    6.
    发明申请
    CDMA power amplifier design for low and high power modes 有权

    公开(公告)号：US20070188224A1

    公开(公告)日：2007-08-16

    申请号：US11784541

    申请日：2007-04-06

    申请人： Gee Dow ,  Jianwen Bao ,  Chun-Wen Huang

    发明人： Gee Dow ,  Jianwen Bao ,  Chun-Wen Huang

    IPC分类号： H03G3/20

    CPC分类号： H03F1/30 ,  H03F1/14 ,  H03F1/3241 ,  H03F1/56 ,  H03F3/189 ,  H03F3/191 ,  H03F3/60 ,  H03F2200/318 ,  H03F2200/411 ,  H03F2200/75

    摘要： An amplifier circuit responsive to a power mode signal improves efficiency at low power levels without compromising efficiency at high power levels. At low power levels, high impedance is presented with suitable adjustment in the phase of the signal. Also, providing for predistortion linearization improves high power efficiency and switching the predistortion linearizer OFF at low power levels contributes little more than a small insertion loss. The power amplifier also uses a bias circuit incorporating a dual harmonic resonance filter to provide high impedance at a fundamental frequency and low impedance at a second harmonic. These properties are of particularly advantageous since amplifiers in cell-phones are used in low power modes most of the time although they are designed to be most efficient at primarily the highest power levels.

    Adjustable low spurious signal DC-DC converter
    7.
    发明授权
    Adjustable low spurious signal DC-DC converter 有权
    可调式低杂散信号DC-DC转换器

    公开(公告)号：US06314008B1

    公开(公告)日：2001-11-06

    申请号：US09688548

    申请日：2000-10-16

    申请人： Jianwen Bao ,  John van Saders ,  Norman Scheinberg

    发明人： Jianwen Bao ,  John van Saders ,  Norman Scheinberg

    IPC分类号： H02M114

    CPC分类号： H02M1/14 ,  H02M3/07 ,  H02M3/18

    摘要： The present invention uses an AC signal and an external DC control voltage to generate a plurality of levels of output DC voltages. The level of the output voltage is determined by the DC control voltage and has the opposite polarity. The invention is preferably implemented as a balanced circuit, which generates spurious signals at even harmonics of the AC frequency signal. The spurious signals can then be filtered out using a low-pass filter.

    摘要翻译： 本发明使用AC信号和外部DC控制电压来产生多个输出直流电压电平。 输出电压的电平由直流控制电压决定，极性相反。 本发明优选地被实现为平衡电路，其在AC频率信号的偶次谐波处产生杂散信号。 然后可以使用低通滤波器过滤出杂散信号。