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1.发明授权Method and apparatus for correcting phase offset errors in a communication device 有权用于校正通信设备中的相位偏移误差的方法和装置公开(公告)号：US08134393B1
公开(公告)日：2012-03-13
申请号：US12893266
申请日：2010-09-29
IPC分类号： H03L7/06
CPC分类号： H03L7/083 , H03L7/0891 , H03L7/101
摘要： A frequency synthesizer that utilizes locked loop circuitry, for example delay locked loop and/or phase locked loop circuits is provided with a means for minimizing static phase/delay errors. An auto-tuning circuit and technique provide a measurement of static phase error by integrating the static phase error in the DLL/PLL circuit. A correction value is determined and applied as a current at the charge pump or as a time/phase offset at the phase detector to minimize static phase error. During normal operation the DLL/PLL is operated with the correction value resulting in substantially reduced spur levels and/or improved settling time.
摘要翻译： 使用锁相环电路（例如延迟锁定环路和/或锁相环路电路）的频率合成器具有用于最小化静态相位/延迟误差的装置。 自动调谐电路和技术通过在DLL / PLL电路中积分静态相位误差来提供静态相位误差的测量。 校正值被确定并应用于电荷泵处的电流或作为相位检测器处的时间/相位偏移，以使静态相位误差最小化。 在正常操作期间，使用校正值来操作DLL / PLL，从而导致显着降低的刺激水平和/或改善的建立时间。
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2.发明申请METHOD AND APPARATUS FOR CORRECTING PHASE OFFSET ERRORS IN A COMMUNICATION DEVICE 有权用于校正通信设备中的相位偏移误差的方法和装置公开(公告)号：US20120074996A1
公开(公告)日：2012-03-29
申请号：US12893266
申请日：2010-09-29
IPC分类号： H03L7/06
CPC分类号： H03L7/083 , H03L7/0891 , H03L7/101
摘要： A frequency synthesizer that utilizes locked loop circuitry, for example delay locked loop and/or phase locked loop circuits is provided with a means for minimizing static phase/delay errors. An auto-tuning circuit and technique provide a measurement of static phase error by integrating the static phase error in the DLL/PLL circuit. A correction value is determined and applied as a current at the charge pump or as a time/phase offset at the phase detector to minimize static phase error. During normal operation the DLL/PLL is operated with the correction value resulting in substantially reduced spur levels and/or improved settling time.
摘要翻译： 使用锁相环电路（例如延迟锁定环路和/或锁相环路电路）的频率合成器具有用于最小化静态相位/延迟误差的装置。 自动调谐电路和技术通过在DLL / PLL电路中积分静态相位误差来提供静态相位误差的测量。 校正值被确定并应用于电荷泵处的电流或作为相位检测器处的时间/相位偏移，以使静态相位误差最小化。 在正常操作期间，使用校正值来操作DLL / PLL，从而导致显着降低的刺激水平和/或改善的建立时间。
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3.发明授权Method and apparatus for fast frequency locking in a closed loop based frequency synthesizer 有权用于在基于闭环的频率合成器中快速锁定的方法和装置公开(公告)号：US08427205B1
公开(公告)日：2013-04-23
申请号：US13328240
申请日：2011-12-16
CPC分类号： H03L7/0814
摘要： A synthesizer comprises a first processing unit that receives digital information relating to a required final frequency of the synthesizer and determines a primary frequency value and a corresponding frequency multiplier mode. A primary synthesizer receives the primary frequency value and an external reference frequency signal to generate a signal of the primary frequency. The synthesizer further comprises a second processing unit that receives the primary frequency value, determines a pre-charge voltage value corresponding to the primary frequency value, and transmits the pre-charge voltage value to a delay locked loop in response to a change in the primary frequency value. The delay locked loop receives the signal of primary frequency and the pre-charge value. The DLL is pre-charged to the pre-charge voltage value for a predetermined time, by opening and closing the delay locked loop to obtain fast locking of the synthesizer.
摘要翻译： 合成器包括第一处理单元，其接收与合成器的所需最终频率有关的数字信息，并确定主频率值和相应的倍频器模式。 主合成器接收主要频率值和外部参考频率信号以产生主要频率的信号。 合成器还包括接收主频率值的第二处理单元，确定对应于主频率值的预充电电压值，并响应于主频率的变化将预充电电压值发送到延迟锁定回路 频率值。 延迟锁定环接收主频率和预充电值的信号。 通过打开和关闭延迟锁定环以获得合成器的快速锁定，将DLL预充电到预充电电压值预定时间。
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公开(公告)号：US08339295B2
公开(公告)日：2012-12-25
申请号：US11831465
申请日：2007-07-31
IPC分类号： H03M1/48
CPC分类号： H03B21/02 , H03L7/0814
摘要： A method and system for managing Digital to Time Conversion (DTC) is provided. The method comprises receiving a first Radio Frequency (RF) signal and a second RF signal. The second RF signal is a phase-shifted first RF signal. The method further comprises converting the first RF signal to a first Intermediate Frequency (IF) signal and the second RF signal to a second IF signal. Further, a time delay between the first IF signal and the second IF signal is estimated based on a time difference measurement technique. The second RF signal is processed based on the estimated time delay to compensate for a delay error associated with the second RF signal.
摘要翻译： 提供了一种用于管理数字到时间转换（DTC）的方法和系统。 该方法包括接收第一射频（RF）信号和第二RF信号。 第二RF信号是相移的第一RF信号。 该方法还包括将第一RF信号转换为第一中频（IF）信号，将第二RF信号转换为第二IF信号。 此外，基于时差测量技术来估计第一IF信号与第二IF信号之间的时间延迟。 基于估计的时间延迟来处理第二RF信号以补偿与第二RF信号相关联的延迟误差。
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5.发明授权Generation of a composite mitigation signal with a desired spectral energy distrubution 有权生成具有所需光谱能量分布的复合缓解信号公开(公告)号：US08155615B2
公开(公告)日：2012-04-10
申请号：US12264342
申请日：2008-11-04
IPC分类号： H04B1/10
CPC分类号： H04L25/4902
摘要： A method (1100, 1200) of generating a composite mitigation signal (216, 902, 1002) is presented. The composite mitigation signal includes an odd integer (N) of transitions (310, 312) between a first amplitude and a second amplitude of the composite mitigation signal. Successive sets of the transition bursts are separated by a desired phase delay or time delay (330), or such separations are defined by a base signal (416) having a frequency equal to a fundamental frequency of the composite mitigation signal. The composite signal generators (222, 900, 1000) that generate the composite mitigation signal are also presented.
摘要翻译： 提出了一种产生复合缓解信号（216,902,1002）的方法（1100,1200）。 复合缓解信号包括在复合缓解信号的第一幅度和第二幅度之间的转换（310,312）的奇整数（N）。 转移脉冲串的连续组被期望的相位延迟或时间延迟分离（330），或者这样的间隔由具有等于复合缓解信号的基频的频率的基本信号（416）定义。 还呈现了生成复合缓解信号的复合信号发生器（222,900,1000）。
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公开(公告)号：US20090033384A1
公开(公告)日：2009-02-05
申请号：US11831465
申请日：2007-07-31
IPC分类号： H03L7/06
CPC分类号： H03B21/02 , H03L7/0814
摘要： A method and system for managing Digital to Time Conversion (DTC) is provided. The method comprises receiving a first Radio Frequency (RF) signal and a second RF signal. The second RF signal is a phase-shifted first RF signal. The method further comprises converting the first RF signal to a first Intermediate Frequency (IF) signal and the second RF signal to a second IF signal. Further, a time delay between the first IF signal and the second IF signal is estimated based on a time difference measurement technique. The second RF signal is processed based on the estimated time delay to compensate for a delay error associated with the second RF signal.
摘要翻译： 提供了一种用于管理数字到时间转换（DTC）的方法和系统。 该方法包括接收第一射频（RF）信号和第二RF信号。 第二RF信号是相移的第一RF信号。 该方法还包括将第一RF信号转换为第一中频（IF）信号，将第二RF信号转换为第二IF信号。 此外，基于时差测量技术来估计第一IF信号和第二IF信号之间的时间延迟。 基于估计的时间延迟来处理第二RF信号以补偿与第二RF信号相关联的延迟误差。
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