公开(公告)号：US5535157A

公开(公告)日：1996-07-09

申请号：US347653

申请日：1994-11-30

申请人： Giovanni Campardo ,  Raffaele Costa ,  Piero Torricelli

发明人： Giovanni Campardo ,  Raffaele Costa ,  Piero Torricelli

IPC分类号： G11C17/00 ,  G11C16/02 ,  G11C16/04 ,  G11C16/16 ,  G11C16/22 ,  G11C7/00

CPC分类号： G11C16/0416 ,  G11C16/04 ,  G11C16/16 ,  G11C16/22

摘要： An integrated device with electrically programmable and erasable memory cells, including one time programmable (OTP) read-only memory cells. A matrix of user memory cells is added at least one row of OTP cells sharing the column selection lines with the other cells. Similarly to the other cells, these have a selection terminal connected to a row selection line. The source terminals of such OTP cells in the row are connected to the device ground through a common selection transistor which is driven from the same row selection line.

摘要翻译： 具有电可编程和可擦除存储单元的集成器件，包括一次可编程（OTP）只读存储器单元。 将用户存储单元的矩阵添加到与其他单元共享列选择行的至少一行OTP单元。 与其他单元类似，它们具有连接到行选择线的选择端子。 该行中的这种OTP单元的源极端子通过从相同行选择线驱动的公共选择晶体管连接到器件地。