摘要:
A receiver of a signal communication apparatus; the apparatus having a transmitter for transmitting the signals, the receiver for receiving the signals and a galvanically isolated wireless interface interposed between the transmitter and the receiver and having a transmitting antenna and a receiving antenna. The receiver including a disturbance rejection circuit coupled to the receiving antenna and capable of compensating for the parasite currents flowing between the transmitting antenna and the receiving antenna at the potential variations between the input and output of the galvanic isolation interface.
摘要:
A receiver of a signal communication apparatus; the apparatus including a transmitter adapted to transmit coded signals, the receiver for receiving the signal and a wireless interface interposed between the transmitter and the receiver and having a transmitting antenna and a receiving antenna. The receiver includes a decoder configured to decode the received signal and circuitry coupled to the receiving antenna and capable of triggering the decoder if the value of the received signal is outside a logical hysteresis having a first logic threshold having a value smaller than the value of the direct current component of the received signal and a second logic threshold having a value greater than the value of the direct current component of the received signal.
摘要:
A receiver of a signal communication apparatus; the apparatus including a transmitter adapted to transmit coded signals, the receiver for receiving the signal and a wireless interface interposed between the transmitter and the receiver and having a transmitting antenna and a receiving antenna. The receiver includes a decoder configured to decode the received signal and circuitry coupled to the receiving antenna and capable of triggering the decoder if the value of the received signal is outside a logical hysteresis having a first logic threshold having a value smaller than the value of the direct current component of the received signal and a second logic threshold having a value greater than the value of the direct current component of the received signal.
摘要:
A receiver of a signal communication apparatus; the apparatus having a transmitter for transmitting the signals, the receiver for receiving the signals and a galvanically isolated wireless interface interposed between the transmitter and the receiver and having a transmitting antenna and a receiving antenna. The receiver including a disturbance rejection circuit coupled to the receiving antenna and capable of compensating for the parasite currents flowing between the transmitting antenna and the receiving antenna at the potential variations between the input and output of the galvanic isolation interface.
摘要:
A signal communication apparatus comprising first and second channels for communicating signals between two electronic devices; each of said first and second channels has a transmitter for transmitting signals, a receiver for receiving signals and an interface arranged between the transmitter and the receiver. The transmitters code the signals in the form of a frame of H bits, with H being an integer, and adapted to serially transmit said frame of H bits through said interface, and the receivers decode the frames of H bits, a frame of H bits having P data bits, K redundancy bits and a sequence of L control bits adapted to identify the type of frame to be transmitted, with L, P and K being integers.
摘要:
A transmission and reception apparatus for at least one digital data signal is described. The digital data signal is characterized by two logical levels, first and second logical levels, with said second logical level higher than the first logical level. The apparatus comprises a transmitter, a receiver and a galvanically isolated interface arranged between the transmitter and the receiver; said transmitter, receiver and interface are arranged so as to form a two-level isolated digital channel and the transmitter comprises a block adapted to send a clock signal to the receiver. The receiver comprises, a circuit adapted to synchronize the receiver and the transmitter using the received clock signal and a circuit adapted to memorize information related to the synchronization in a storage element to hold the synchronization while the receiver is receiving said digital data. The transmitter block is adapted to send said digital data signal after the synchronization of the receiver and transmitter.
摘要:
A transmission and reception apparatus includes a transmitter, a receiver and a galvanically isolated interface arranged between the transmitter and the receiver. The transmitter, receiver and interface are arranged so as to form a two-level isolated digital channel and the transmitter includes a block adapted to send a clock signal to the receiver. The receiver includes a circuit adapted to synchronize the receiver and the transmitter using the received clock signal and a circuit adapted to memorize information related to the synchronization in a storage element to hold the synchronization while the receiver is receiving the digital data. The transmitter block is adapted to send the digital data signal after the synchronization of the receiver and transmitter.
摘要:
A signal communication apparatus comprising first and second channels for communicating signals between two electronic devices; each of said first and second channels has a transmitter for transmitting signals, a receiver for receiving signals and an interface arranged between the transmitter and the receiver. The transmitters code the signals in the form of a frame of H bits, with H being an integer, and adapted to serially transmit said frame of H bits through said interface, and the receivers decode the frames of H bits, a frame of H bits having P data bits, K redundancy bits and a sequence of L control bits adapted to identify the type of frame to be transmitted, with L, P and K being integers.
摘要:
A device and method for driving a converter circuit that supplies a charge via a first electronic switch and a second electronic switch alternately turned on and off. A generator module generates a memory signal, indicating the duration of a first dead-time interval. A delay module, sensitive to the memory signal controls turning-on of the first electronic switch with a delay, with respect to turning-off of the second electronic switch, so that a second dead-time interval has a duration substantially equal to the duration of the first dead-time interval.
摘要:
A device and method for driving a converter circuit that supplies a charge via a first electronic switch and a second electronic switch alternately turned on and off. A generator module generates a memory signal, indicating the duration of a first dead-time interval. A delay module, sensitive to the memory signal controls turning-on of the first electronic switch with a delay, with respect to turning-off of the second electronic switch, so that a second dead-time interval has a duration substantially equal to the duration of the first dead-time interval.