公开(公告)号：US4837678A

公开(公告)日：1989-06-06

申请号：US35349

申请日：1987-04-07

申请人： Glen J. Culler ,  Robert B. Pearson ,  Michael McCammon ,  William L. Proctor ,  John L. Richardson

发明人： Glen J. Culler ,  Robert B. Pearson ,  Michael McCammon ,  William L. Proctor ,  John L. Richardson

IPC分类号： G06F9/22 ,  G06F9/28 ,  G06F9/38

CPC分类号： G06F9/3814 ,  G06F9/223 ,  G06F9/28 ,  G06F9/3802 ,  G06F9/3889

摘要： An instruction sequencer for programming parallel operations of functional units in response to an instruction stream is shown. The instruction sequencer includes a random access memory for storing instruction segments which program the operations of the functional units. An instruction address register contains instruction addresses for selected locations in the memory having instruction segments stored therein. A memory address circuit reads out an instruction stream comprising instruction segments from the memory in response to the stored instruction address and stores the same in an instruction buffer register. A rotating network, which is operatively coupled to the instruction buffer register, rotates the instruction stream so as to position a selected instruction segment at a predetermined location in a rotating network. A control circuit determines whether the rotating network is required to rotate the instruction stream and, if so, directs the rotating network to position the selected instruction segment at the predetermined location in the rotating network. A first decoding circuit receives and decodes the selected instruction segment to produce a first control signal. A shifting circuit receives the rotated instruction stream and shifts the same an amount equal to at least the width of the selected instruction segment and then applies the same to a second decoding circuit which produces a second control signal. The first and second control signals are adapted to be applied to and commence operation of the functional units in parallel.

摘要翻译： 示出了用于响应于指令流来编程功能单元的并行操作的指令定序器。 指令定序器包括用于存储对功能单元的操作进行编程的指令段的随机存取存储器。 指令地址寄存器包含存储器中存储有指令段的选择位置的指令地址。 存储器地址电路响应于存储的指令地址从存储器读出包括指令段的指令流，并将其存储在指令缓冲寄存器中。 可操作地耦合到指令缓冲寄存器的旋转网络旋转指令流，以将所选择的指令段定位在旋转网络中的预定位置。 控制电路确定旋转网络是否需要旋转指令流，如果是，则引导旋转网络将所选择的指令段定位在旋转网络中的预定位置。 第一解码电路接收并解码所选择的指令段以产生第一控制信号。 移位电路接收旋转的指令流，并移位相等于至少所选指令段的宽度的量，然后将其应用于产生第二控制信号的第二解码电路。 第一和第二控制信号被并行地应用于并开始运行功能单元。