公开(公告)号：US11157421B2

公开(公告)日：2021-10-26

申请号：US15857672

申请日：2017-12-29

申请人： Gowin Semiconductor Corporation

发明人： Jinghui Zhu ,  San-Ta Kow ,  Tun Jun Gao ,  Diwakar Chopperla ,  Chienkuang Chen ,  Ning Song

IPC分类号： G06F13/10 ,  H03K19/177 ,  G06F12/06 ,  G06F13/42 ,  G06F13/12

摘要： The present application discloses a system level integrated circuit chip, comprising a fixed logic module and a Programmable Logic Module; the fixed logic module comprising a CPU module, a non-volatile memory module, a high speed data transmission module, an analogue-to-digital and/or digital-to-analogue conversion module; the Programmable Logic Module comprising a user-defined field programmable gate array and a programmable control module; the CPU module is interconnected with the user-defined field programmable gate array and the programmable control module; the non-volatile memory is interconnected with the user-defined field programmable gate array and the programmable control module; the analogue-to-digital and/or digital-to-analogue conversion module are connected with the user-defined field programmable gate array; and the high speed data transmission module is interconnected with the user-defined field programmable gate array. The present application solves the problem of the combination of a variety of different devices and the integration of processing capabilities with different applications.

公开(公告)号：US20190114268A1

公开(公告)日：2019-04-18

申请号：US15857672

申请日：2017-12-29

申请人： Gowin Semiconductor Corporation

发明人： Jinghui Zhu ,  San-Ta Kow ,  Tun Jun Gao ,  Diwakar Chopperla ,  Chienkuang Chen ,  Ning Song

IPC分类号： G06F13/10 ,  H03K19/177 ,  G06F13/42 ,  G06F12/06

摘要： The present application discloses a system level integrated circuit chip, comprising a fixed logic module and a Programmable Logic Module; the fixed logic module comprising a CPU module, a non-volatile memory module, a high speed data transmission module, an analogue-to-digital and/or digital-to-analogue conversion module; the Programmable Logic Module comprising a user-defined field programmable gate array and a programmable control module; the CPU module is interconnected with the user-defined field programmable gate array and the programmable control module; the non-volatile memory is interconnected with the user-defined field programmable gate array and the programmable control module; the analogue-to-digital and/or digital-to-analogue conversion module are connected with the user-defined field programmable gate array; and the high speed data transmission module is interconnected with the user-defined field programmable gate array. The present application solves the problem of the combination of a variety of different devices and the integration of processing capabilities with different applications.