-
公开(公告)号:US07612737B2
公开(公告)日:2009-11-03
申请号:US11393161
申请日:2006-03-28
申请人: Gregory Scott Bright , Scott W. Straka , Philip C. Black , James G. Moore , John R. Lewis , Hakan Urey , Clarence T. Tegreene
发明人: Gregory Scott Bright , Scott W. Straka , Philip C. Black , James G. Moore , John R. Lewis , Hakan Urey , Clarence T. Tegreene
IPC分类号: G09G3/00
CPC分类号: G02B27/017 , G09G3/001 , G09G3/025 , H04N3/08 , H04N5/04 , H04N5/06 , H04N5/126 , H04N9/3132 , H04N9/641
摘要: A scanned beam display is operable to compensate for variations in apparent pixel brightness arising from variations in beam scanning velocity and/or pixel dwell times. A compensation circuit modifies pixel values according to their scanning velocity and/or dwell time.
摘要翻译: 扫描光束显示器可操作以补偿由波束扫描速度和/或像素停留时间的变化引起的视在像素亮度的变化。 补偿电路根据其扫描速度和/或停留时间修改像素值。
-
公开(公告)号:US07061450B2
公开(公告)日:2006-06-13
申请号:US10118861
申请日:2002-04-09
申请人: Gregory Scott Bright , Scott W. Straka , Philip C. Black , James G. Moore , John R. Lewis , Hakan Urey , Clarence T. Tegreene
发明人: Gregory Scott Bright , Scott W. Straka , Philip C. Black , James G. Moore , John R. Lewis , Hakan Urey , Clarence T. Tegreene
IPC分类号: G09G5/00
CPC分类号: G02B27/017 , G09G3/001 , G09G3/025 , H04N3/08 , H04N5/04 , H04N5/06 , H04N5/126 , H04N9/3132 , H04N9/641
摘要: A scanning control circuit generates a clock signal corresponding to an expected scan timing of a resonant scanner. In one approach, the control circuit uses a pair of direct digital synthesis (DDS) integrated circuits. A first DDS chip provides a system clock that is synchronized to the monitored period of the scanner. A second DDS chip generates a frequency chirped signal that has a frequency profile corresponding to a desired pixel clock timing. To control phase precisely, four complementary clock signals are weighted and mixed at light source drivers to produce relative phase shifts for different light sources.
-
公开(公告)号:USD660899S1
公开(公告)日:2012-05-29
申请号:US29350016
申请日:2009-11-10
-
-