Method and means for determining the state and/or genuineness of flat
articles
    1.
    发明授权
    Method and means for determining the state and/or genuineness of flat articles 失效
    用于确定扁平制品的状态和/或真实性的方法和装置

    公开(公告)号:US4435834A

    公开(公告)日:1984-03-06

    申请号:US371425

    申请日:1982-04-23

    IPC分类号: G07D7/12 G07D7/20 G06K9/00

    CPC分类号: G07D7/12 G07D7/20

    摘要: The invention discloses a method and an apparatus for determining the condition or genuineness of flat articles, in particular bank-notes. The bank-note passes through a test station in which a large portion of its surface is scanned by a scanning system as it passes through. The electric signals generated by the scanning system are edited in an analyzing electronic circuit and compared with suitable limiting values and a signal denoting a faulty position is generated when a certain tolerance is exceeded. At least one surface portion defined in respect of position and size is selected and the electric signals appropriate to the scanning of this surface portion are compared only with limiting values selected for this portion. Thus, it is possible to check the condition and/or genuineness of flat articles, such as sheets of paper, securities, bank-notes and the like while the general rate of rejection and the exact analysis of preferred portions can be equally set alongside one another, without influencing one another, and examined.

    摘要翻译: 本发明公开了一种用于确定扁平制品,特别是纸币的状况或真实性的方法和装置。 钞票通过一个测试台,其中大部分表面在扫描系统通过时被扫描系统扫描。 由扫描系统产生的电信号在分析电子电路中进行编辑,并与适当的限制值进行比较,并且当超过某一公差时,产生表示故障位置的信号。 选择关于位置和大小限定的至少一个表面部分,并且将与该表面部分的扫描相适应的电信号仅与为该部分选择的限制值进行比较。 因此,可以检查诸如纸张,证券,纸币等的扁平制品的状况和/或真实性,同时可以将一般的拒收率和优选部分的确切分析与一个等同地设置在一起 另一个,没有彼此影响,并检查。

    Circuit arrangement for evaluating signals, particularly output signals
of optical measuring devices
    2.
    发明授权
    Circuit arrangement for evaluating signals, particularly output signals of optical measuring devices 失效
    用于评估信号的电路布置,光学测量装置的特别输出信号

    公开(公告)号:US4075507A

    公开(公告)日:1978-02-21

    申请号:US663856

    申请日:1976-03-04

    摘要: The circuit arrangement includes a measuring device having an output circuit connected to one input of a comparator, and including a voltage divider whose tap is connected to the other input of the comparator. A storage capacitor is connected to the tap of the voltage divider and to such other input of the comparator and provides a reference voltage bearing a fixed relation to, but always lower than, the signal voltage of the measuring device in the quiescent state of the arrangement. A bias voltage may be applied to the tap of the voltage divider. When the measuring device responds to a test object, the voltages at the comparator inputs are so switched that the reference voltage is held above the signal voltage until the measuring device returns to the quiescent state. In the quiescent state, the signal voltage exceeds the reference voltage and the comparator, changing back to the zero state, restores the initial condition of the two voltages. A switching arrangement is provided which, when the reference voltage falls below a predetermined minimum value, and if the arrangement has not switched to the operating state, provides a corresponding logic signal.