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公开(公告)号：US12050484B2
公开(公告)日：2024-07-30
申请号：US17051637
申请日：2019-04-17
发明人： Kenji Tanaka , Naoki Miura , Shinsuke Nakano , Hideyuki Nosaka
摘要： A clock generation circuit includes a mode-locked laser that generates an optical pulse, a photodiode that photoelectrically converts the optical pulse generated by the mode-locked laser, and a filter that attenuates at least one of a DC component and a harmonic component of the mode-locked laser included in an electric signal output from the photodiode.
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公开(公告)号：US11191170B2
公开(公告)日：2021-11-30
申请号：US16936145
申请日：2020-07-22
申请人： Michael Casey
发明人： Michael Casey
摘要： A contact element for use between electronic components like computer chips and printed circuit boards, or the connection between an electronic component in a test socket to provide high current, high density, and high frequency connections between the electronic components. The contact element preferably achieves a good connection between electrical components when they are connected and pressed together. The contact element is preferably made of a conductive silicone rubber which has been plated.
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公开(公告)号：US11119385B2
公开(公告)日：2021-09-14
申请号：US16534766
申请日：2019-08-07
申请人： Psiquantum, Corp.
发明人： Albert Wang
摘要： A system for generating clock signals for a photonic quantum computing system includes a pump photon source configured to generate a plurality of pump photon pulses at a first repetition rate, a waveguide optically coupled to the pump photon source, and a photon-pair source optically coupled to the first waveguide. The system also includes a photodetector optically coupled to the photon-pair source and configured to generate a plurality of electrical pulses in response to detection of at least a portion of the plurality of pump photon pulses at the first repetition rate and a clock generator coupled to the photodetector and configured to convert the plurality of electrical pulses into a plurality of clock signals at the first repetition rate.
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公开(公告)号：US11054598B1
公开(公告)日：2021-07-06
申请号：US16681596
申请日：2019-11-12
发明人： Daniel Yap , Jongchan Kang
摘要： An optical transmitter includes a superconducting driver circuit including at least one Josephson junction, the superconducting driver circuit having a voltage output and having a connection to a circuit ground, a first bias circuit coupled to the voltage output of the superconducting driver circuit, a second bias circuit, wherein the second bias circuit establishes a positive bias voltage relative to the circuit ground, and an electro-optic device having a first end and a second end, wherein the first end of the electro-optic device is coupled to the voltage output of the superconducting driver circuit, and wherein the second end of the electro-optic device is coupled to the second bias circuit.
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公开(公告)号：US20200350898A1
公开(公告)日：2020-11-05
申请号：US16801432
申请日：2020-02-26
申请人： KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY , KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION, SEJONG CAMPUS
发明人： Jungwon Kim , Hayun Cecilla Chung , Minji Hyun , Yongjin Na
摘要： A low-jitter digital clock signal generating system which uses optical pulses output from a pulse laser includes a first balanced photodetector that converts first and second optical pulses with a delayed time interval into first and second electrical pulses through first and second photodiodes and outputs first and second modulated pulses generated by allowing the first and second electrical pulses to partially overlap each other, a second balanced photodetector that converts third and fourth optical pulses with the delayed time interval into third and fourth electrical pulses through third and fourth photodiodes, and outputs a second modulated pulse generated by allowing the third and fourth electrical pulses to partially overlap each other, and a capacitor. The capacitor is charged by the first modulated pulse, is discharged by the second modulated pulse, and outputs a voltage according to the charging and discharging as a clock signal.
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公开(公告)号：US20200301244A1
公开(公告)日：2020-09-24
申请号：US16534766
申请日：2019-08-07
申请人： Psiquantum, Corp.
发明人： Albert Wang
摘要： A system for generating clock signals for a photonic quantum computing system includes a pump photon source configured to generate a plurality of pump photon pulses at a first repetition rate, a waveguide optically coupled to the pump photon source, and a photon-pair source optically coupled to the first waveguide. The system also includes a photodetector optically coupled to the photon-pair source and configured to generate a plurality of electrical pulses in response to detection of at least a portion of the plurality of pump photon pulses at the first repetition rate and a clock generator coupled to the photodetector and configured to convert the plurality of electrical pulses into a plurality of clock signals at the first repetition rate.
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公开(公告)号：US20180253633A1
公开(公告)日：2018-09-06
申请号：US15801517
申请日：2017-11-02
发明人： Alexandre Sarafianos , Thomas Ordas
IPC分类号： G06K19/073 , H03K3/42 , G05B19/042 , H01L21/56
摘要： In some embodiments, an electronic chip includes a doped semiconductor substrate of a first conductivity type, and wells of the second conductivity type on the side of the front face of the chip, in and on which wells circuit elements are formed. One or more slabs of a second conductivity type are buried under the wells and are separated from the wells. The electronic chip also includes, for each buried slab, a biasable section of the second conductivity type, which extends from the front face of the substrate to the buried slab. A first MOS transistor with a channel of the first conductivity type is disposed in the upper portion of each section, where the first transistor is an element of a flip-flop. A circuit is used for detecting a change in the logic level of one of the flip-flops.
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公开(公告)号：US20180152179A1
公开(公告)日：2018-05-31
申请号：US15605536
申请日：2017-05-25
发明人： Hanae Zegmout , Denis Pache , Stephane Le Tual
IPC分类号： H03K3/42
摘要： The present disclosure relates to a device for converting an optical pulse to an electronic pulse includes a photoresistor having first and second terminals and being capable of receiving a pulsed laser signal arising from a mode-locked laser source The first terminal is linked to a node for applying a reference potential via a resistive element and a capacitive element connected in parallel. The second terminal is connected to a node for applying a supply potential.
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9.发明授权Sample clock generator for optical tomographic imaging apparatus, and optical tomographic imaging apparatus 有权用于光学断层成像装置的采样时钟发生器和光学断层成像装置公开(公告)号：US09584098B2
公开(公告)日：2017-02-28
申请号：US14562850
申请日：2014-12-08
申请人： TOMEY CORPORATION
CPC分类号： H03K3/013 , A61B3/102 , G01B9/02004 , G01B9/02069 , G01B9/02091 , G02B27/10 , G02F1/21 , H01L31/02325 , H03K3/42
摘要： A sample clock generator includes a first optical path and a second optical path through which input lights are guided, an optical phase shifter to shift a phase of the input light guided through the first optical path, an interference-light generating unit to combine a phase-shifted input light and the input light guided through the second optical path to thereby generate an interference light for sample clock, a splitting unit to split the interference light for sample clock into two split lights having different phases, one light receiving unit to at least receive one split light from among the two split lights having different phases, the other light receiving unit to at least receive the other split light, a signal generating unit to generate a sample clock signal based on signals outputted from the one light receiving unit and the other light receiving unit.
摘要翻译： 采样时钟发生器包括第一光路和通过其被引导输入光的第二光路，用于移位通过第一光路引导的输入光的相位的光学移相器，干涉光产生单元，以组合相位 输入光通过第二光路引导，从而产生用于采样时钟的干涉光;分割单元，用于将采样时钟的干涉光分为具有不同相位的两个分离光，至少一个光接收单元 从具有不同相位的两个分裂光中接收一个分离光，另一个光接收单元至少接收另一个分离光;信号产生单元，用于基于从一个光接收单元输出的信号和 其他光接收单元。
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10.发明授权Method and circuit for generating a proportional-to-absolute-temperature current source 有权用于产生比例绝对温度电流源的方法和电路公开(公告)号：US09501081B2
公开(公告)日：2016-11-22
申请号：US14572767
申请日：2014-12-16
申请人： John M. Pigott
发明人： John M. Pigott
CPC分类号： G05F3/267
摘要： A proportional-to-absolute-temperature (“PTAT”) circuit includes a bias component; first, second, third, and fourth transistors; an output transistor; and a first resistive component. A first terminal of the bias component is coupled to a voltage supply node. The first and second transistors are connected to a second terminal of the bias component. The third and fourth transistors have different current densities. The first transistor is coupled to the third transistor. The second transistor is coupled to the fourth transistor. The fourth transistor and the first resistive component are coupled to a voltage common node. The output transistor has a control terminal coupled to the second and fourth transistors, a first current terminal connected to an output node, and a second current terminal coupled to the third transistor and the first resistive component. The PTAT circuit is configured to generate at least a portion of a PTAT current at the output node.
摘要翻译： 比例绝对温度（“PTAT”）电路包括偏置分量; 第一，第二，第三和第四晶体管; 输出晶体管; 和第一电阻元件。 偏置元件的第一端子耦合到电压供应节点。 第一和第二晶体管连接到偏置部件的第二端子。 第三和第四晶体管具有不同的电流密度。 第一晶体管耦合到第三晶体管。 第二晶体管耦合到第四晶体管。 第四晶体管和第一电阻分量耦合到电压公共节点。 输出晶体管具有耦合到第二和第四晶体管的控制端子，连接到输出节点的第一电流端子和耦合到第三晶体管和第一电阻部件的第二电流端子。 PTAT电路被配置为在输出节点处产生PTAT电流的至少一部分。
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