摘要:
A method and system are disclosed for synchronizing graphics processing events in a multi-GPU computer system. A master GPU renders a first image into a first portion of a master buffer associated with a display interface, and then writes a first predetermined value corresponding to the first image in a first memory unit. A slave GPU renders a second image into a slave buffer, and then transfers the second image to a second portion of the master buffer, and writes a second predetermined value corresponding to the second image in the first memory unit. The first and second predetermined values represent a queuing sequence of the rendered images. The master GPU flips the first image to display only after examining the first predetermined value in the first memory unit, and flips the second image to display only after examining the second predetermined value in the first memory unit.
摘要:
A method and system are disclosed for synchronizing graphics processing events in a multi-GPU computer system. A master GPU renders a first image into a first portion of a master buffer associated with a display interface, and then writes a first predetermined value corresponding to the first image in a first memory unit. A slave GPU renders a second image into a slave buffer, and then transfers the second image to a second portion of the master buffer, and writes a second predetermined value corresponding to the second image in the first memory unit. The first and second predetermined values represent a queuing sequence of the rendered images. The master GPU flips the first image to display only after examining the first predetermined value in the first memory unit, and flips the second image to display only after examining the second predetermined value in the first memory unit.
摘要:
This invention discloses a method and system for implementing transparent multi-buffering in multi-GPU graphics subsystems. The purpose of multi-buffering is to reduce GPU idle time. In one example, after rendering a first image by a first GPU in a back buffer, the first image is displayed by flipping to the back buffer. After that, the front buffer and back buffer are exchanged, and then shifting the back buffer and internal buffers in a predetermined sequence. A second image is rendered to current back buffer by a second GPU. The second image is displayed by flipping to a current back buffer. After that, the front buffer and back buffer are exchanged again, and shifting the back buffer and internal buffers again.
摘要:
This invention discloses a method and system for implementing transparent multi-buffering in multi-GPU graphics subsystems. The purpose of multi-buffering is to reduce GPU idle time. In one example, after rendering a first image by a first GPU in a back buffer, the first image is displayed by flipping to the back buffer. After that, the front buffer and back buffer are exchanged, and then shifting the back buffer and internal buffers in a predetermined sequence. A second image is rendered to current back buffer by a second GPU. The second image is displayed by flipping to a current back buffer. After that, the front buffer and back buffer are exchanged again, and shifting the back buffer and internal buffers again.
摘要:
This invention discloses a method for executing vertex shader in a computer system, the method comprising running software vertex shader for a predetermined vertex shader command in a CPU thread when a GPU is overloaded by vertex shader execution, buffering the output of the software vertex shader, running hardware vertex shader for z-values of the vertex shader command, and replacing z-values from the software vertex shader with the z-values from the hardware vertex shader, wherein the vertex shader overloading can be lessoned yet the vertex shader z-values are consistently transformed by the hardware vertex shader.
摘要:
A dynamics performance testing system, for use in testing the dynamics performance of an anchor rod or an anchor rode, comprising a main machine and a measurement and control system. The main machine comprises a vertical machine frame (1), a clamping apparatus (3) arranged on the top of the vertical machine frame (1) and used for vertically clamping the top end of a sample (6), where the sample (6) is provided at the bottom end thereof with a tray (61), a drop-hammering apparatus (2) used for being dropped vertically from the vertical machine frame (1) at a set height to impact the tray (61), a lifting apparatus used for lifting the drop-hammering apparatus at the bottom of the vertical machine frame (1) to the set height, and a protection apparatus used for physical protection and isolation to reduce bodily injury and noise. The measurement and control system controls the drop-hammering apparatus to select a parameter for drop-hammering and a process of lifting and dropping. The real-time impact on the tray (61) when the drop-hammering apparatus is dropped vertically is sensed by a force sensor, while real-time impact data received from a sensor device is analyzed, and a test result is outputted. The dynamics performance testing system is provided with versatility while the test result is accurate and reliable.
摘要:
A method and system are disclosed for synchronizing two or more engines in a graphics processing unit (GPU). When issuing a command to an engine, a central processing unit (CPU) writes an event value representing the command into an element of an event memory associated with the engine. After executing the command, the engine modifies the content of the event memory in order to recognize the completion of the command execution. The CPU acquires the command execution status by reading the modified content of the event memory. With precise knowledge of the command execution status, the CPU can issue commands to various engines independently, hence the engines can run parallel.
摘要:
A camera pose tracking apparatus may track a camera pose based on frames photographed using at least three cameras, may extract and track at least one first feature in multiple-frames, and may track a pose of each camera in each of the multiple-frames based on first features. When the first features are tracked in the multiple-frames, the camera pose tracking apparatus may track each camera pose in each of at least one single-frame based on at least one second feature of each of the at least one single-frame. Each of the at least one second feature may correspond to one of the at least one first feature, and each of the at least one single-frame may be a previous frame of an initial frame of which the number of tracked second features is less than a threshold, among frames consecutive to multiple-frames.
摘要:
A camera pose tracking apparatus may track a camera pose based on frames photographed using at least three cameras, may extract and track at least one first feature in multiple-frames, and may track a pose of each camera in each of the multiple-frames based on first features. When the first features are tracked in the multiple-frames, the camera pose tracking apparatus may track each camera pose in each of at least one single-frame based on at least one second feature of each of the at least one single-frame. Each of the at least one second feature may correspond to one of the at least one first feature, and each of the at least one single-frame may be a previous frame of an initial frame of which the number of tracked second features is less than a threshold, among frames consecutive to multiple-frames.
摘要:
An image processing apparatus and method may estimate binocular disparity maps of middle views from among a plurality of views through use of images of the plurality of views. The image processing apparatus may detect a moving object from the middle views based on the binocular disparity maps of the frames. Pixels in the middle views may be separated into dynamic pixels and static pixels through detection of the moving object. The image processing apparatus may apply bundle optimization and a local three-dimensional (3D) line model-based temporal optimization to the middle views so as to enhance binocular disparity values of the static pixels and dynamic pixels.