Apparatus and method for a drilling assembly
    1.
    发明授权
    Apparatus and method for a drilling assembly 失效
    钻井组件的装置和方法

    公开(公告)号:US08033345B1

    公开(公告)日:2011-10-11

    申请号:US12005747

    申请日:2007-12-28

    IPC分类号: E21B19/08 E21B44/06

    CPC分类号: E21B7/04 E21B15/04 E21B19/083

    摘要: A drilling assembly for drilling pipe into a drilling surface using a drill bit. The drilling assembly comprises a power unit, a thrust frame, a means for moving the thrust frame, a rotary and carriage assembly and a microprocessor adapted to control the load on the drill based upon the level of mud pressure in the assembly. The drilling assembly is adapted to drill pipe at any angle relative to the drilling surface between substantially parallel to the drilling surface and substantially perpendicular to the drilling surface. The method comprises providing a such drilling assembly, placing a drill pipe onto the drilling assembly, moving the thrust frame to a desired drilling angle, moving the rotary and carriage assembly into direct contact with the drill pipe, applying rotational, thrust and pull-back forces to the drill pipe, drilling the pipe into the drilling surface and controlling the load on the drill bit.

    摘要翻译: 一种钻孔组件,用于使用钻头将管道钻入钻井表面。 钻孔组件包括动力单元,推力框架,用于移动推力框架的装置,旋转和滑架组件以及适于基于组件中的泥浆压力水平来控制钻头上的负载的微处理器。 钻井组件适于在基本上平行于钻孔表面并且基本上垂直于钻井表面之间相对于钻井表面以任何角度钻管。 该方法包括提供一种这样的钻井组件,将钻杆放置在钻井组件上,将推力框架移动到期望的钻孔角度,将旋转和托架组件移动成与钻杆直接接触,施加旋转,推力和回拉 向钻杆施加力,将管道钻入钻孔表面并控制钻头上的载荷。

    Method For Changing A Thread Priority In A Simultaneous Multithread Processor
    2.
    发明申请
    Method For Changing A Thread Priority In A Simultaneous Multithread Processor 审中-公开
    在同时多线程处理器中更改线程优先级的方法

    公开(公告)号:US20080109640A1

    公开(公告)日:2008-05-08

    申请号:US12015088

    申请日:2008-01-16

    IPC分类号: G06F9/30

    摘要: An SMT system is designed to allow software alteration of thread priority. In one case, the system signals a change in a thread priority based on the state of instruction execution and in particular when the instruction has completed execution. To alter the priority of a thread, the software uses a special form of a “no operation” (NOP) instruction (hereafter termed thread priority NOP). When the thread priority NOP is dispatched, its special NOP is decoded in the decode unit of the IDU into an operation that writes a special code into the completion table for the thread priority NOP. A “trouble” bit is also set in the completion table that indicates which instruction group contains the thread priority NOP. The trouble bit indicates that special processing is required after instruction completion. The thread priority instruction is processed after completion using the special code to change a thread's priority.

    摘要翻译: SMT系统旨在允许软件更改线程优先级。 在一种情况下,系统基于指令执行的状态,特别是当指令完成执行时,发出线程优先级的改变。 要更改线程的优先级,软件使用特殊形式的“无操作”(NOP)指令(以下称为线程优先级NOP)。 当调度线程优先级NOP时,其特殊NOP在IDU的解码单元中解码为将特殊代码写入线程优先级NOP的完成表的操作。 在完成表中也设置了“故障”位,指示哪个指令组包含线程优先级NOP。 故障位表示指令完成后需要进行特殊处理。 线程优先级指令在完成后使用特殊代码进行处理,以更改线程的优先级。

    METHOD AND APPARATUS FOR BACK TO BACK ISSUE OF DEPENDENT INSTRUCTIONS IN AN OUT OF ORDER ISSUE QUEUE
    3.
    发明申请
    METHOD AND APPARATUS FOR BACK TO BACK ISSUE OF DEPENDENT INSTRUCTIONS IN AN OUT OF ORDER ISSUE QUEUE 失效
    方法和装置在订单问题之后返回发出相关指示

    公开(公告)号:US20070250687A1

    公开(公告)日:2007-10-25

    申请号:US11380078

    申请日:2006-04-25

    IPC分类号: G06F9/30

    CPC分类号: G06F9/3836 G06F9/3838

    摘要: A method is provided for evaluating two or more instructions in an out of order issue queue during a particular cycle of the queue, to select an instruction for issue during the next following cycle. If an instruction was previously designated to issue during the particular cycle, one or more instructions in the queue are evaluated to determine if any of them are dependent on the designated instruction. For the evaluation, each instruction placed into the queue is accompanied by corresponding logic elements that provide destination to source compares for the instruction. In an embodiment comprising a method, the oldest ready instruction in the queue during a particular cycle is identified. When an instruction was previously designated to issue during the particular cycle, it is determined whether at least a first instruction in the queue complies with each condition in a set of conditions, the set including at least the conditions that the first instruction has a dependency on the designated instruction, and that the first instruction is older than the oldest ready instruction. The first instruction is selected for issue during the next following cycle only if the first instruction complies with each condition in the set.

    摘要翻译: 提供了一种用于在队列的特定周期期间评估出故障发送队列中的两个或更多个指令的方法,以在下一个后续周期中选择要发出的指令。 如果先前指定在特定周期内发出指令,则会对队列中的一个或多个指令进行评估,以确定其中任何一个是否依赖于指定的指令。 对于评估,放置到队列中的每条指令都伴随有相应的逻辑元素,为指令提供目标到源的比较。 在包括方法的实施例中,识别在特定周期期间队列中最早的就绪指令。 当先前指定在特定周期期间发出指令时,确定队列中的至少第一指令是否符合一组条件中的每个条件,该集合至少包括第一指令依赖于的条件 指定的指令,并且第一条指令比最早的就绪指令更旧。 仅当第一条指令符合该组中的每个条件时,才在下一个后续周期中选择第一条指令进行发布。

    Method and system for on-demand scratch register renaming
    4.
    发明申请
    Method and system for on-demand scratch register renaming 失效
    用于按需暂存寄存器重命名的方法和系统

    公开(公告)号:US20070234011A1

    公开(公告)日:2007-10-04

    申请号:US11390785

    申请日:2006-03-28

    IPC分类号: G06F9/30

    摘要: A method and processor for performing on-demand scratch register reallocation by dynamically adjusting the number of scratch registers from within the pool of rename registers includes initially allocating from a set of physical registers one or more architected registers and a pool of one or more rename registers and allocating from the pool of rename registers an initial number of scratch registers for storing microcode operands. In response to detecting that a fetched instruction requires an additional scratch register beyond the initial number, a selected physical register is reallocated from among the pool of rename registers as the additional scratch register, and a flag is set to indicate the rename register is allocated as the additional scratch register. In response to determining that the additional scratch register is no longer needed, the additional scratch register is deallocated and the flag is reset, such that the selected physical register returns to the pool of rename registers.

    摘要翻译: 用于通过从重命名寄存器池内动态地调整临时寄存器的数量来执行按需暂存寄存器重新分配的方法和处理器包括:首先从一组物理寄存器分配一个或多个架构寄存器和一个或多个重命名寄存器池 并从重命名寄存器池分配初始数量的用于存储微代码操作数的暂存寄存器。 响应于检测到所取出的指令需要超出初始号码的额外的临时寄存器,所选择的物理寄存器作为额外的临时寄存器从重命名寄存器池中重新分配,并且将标志设置为指示重命名寄存器被分配为 额外的擦写寄存器。 响应于确定不再需要额外的临时寄存器,额外的临时寄存器被解除分配并且该标志被复位,使得所选择的物理寄存器返回到重命名寄存器池。

    Processor including a register file and method for computing flush masks in a multi-threaded processing system
    5.
    发明申请
    Processor including a register file and method for computing flush masks in a multi-threaded processing system 有权
    处理器包括用于在多线程处理系统中计算闪存掩码的寄存器文件和方法

    公开(公告)号:US20060155966A1

    公开(公告)日:2006-07-13

    申请号:US11324399

    申请日:2006-01-03

    IPC分类号: G06F9/30

    摘要: A processor including a register file and method for computing flush masks in a multi-threaded processing system provides fast and low-logic-overhead computation of a flush result in response to multiple flush request sources. A flush mask register file is implemented by multiple cells in an array where cells are absent from the diagonal where the column index is equal to the row index. Each cell has a vertical write enable and a horizontal write enable. When a row is written to validate that row's tag value, the column having an index equal to the row selector is automatically reset (excepting the bit corresponding to the absent cell mentioned above). On a read of a row in the array, a wired-AND circuit provided at each column provides a bit field corresponding to other rows that have been written since a last reset of the row, which is a flush mask indicating newer tags and the selected tag. Each cell in the array has an output for each thread supported by the array, and the logic provides a flush mask output for each thread as well as a combined flush mask output that supports simultaneous access for all of the threads.

    摘要翻译: 包括用于在多线程处理系统中计算闪存掩码的寄存器文件和方法的处理器响应于多个刷新请求源而提供刷新结果的快速和低逻辑开销计算。 刷新掩码寄存器文件由数组中的多个单元格实现,其中单元格不在对角线,其中列索引等于行索引。 每个单元都具有垂直写入使能和水平写入使能。 当一行写入以验证该行的标签值时,具有等于行选择器的索引的列将自动重置(除了与上述缺少的单元格相对应的位)。 在阵列中的一行读取中,每列提供的有线AND电路提供了与自行的最后一次复位以来写入的其他行相对应的位字段,该行是指示较新标记的刷新掩码,并且所选择的 标签。 数组中的每个单元格都具有数组支持的每个线程的输出,逻辑为每个线程提供了一个刷新掩码输出以及一个组合的刷新输出,支持所有线程的同时访问。