公开(公告)号：US20180285074A1

公开(公告)日：2018-10-04

申请号：US15476697

申请日：2017-03-31

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Gurinder Shergill ,  Roopesh Kumar Tamma ,  Thomas H. Mariette

IPC: G06F5/14 ,  G06F3/06 ,  G06F13/28 ,  G06F13/16

CPC classification number: G06F5/14 ,  G06F3/061 ,  G06F3/0659 ,  G06F3/067 ,  G06F5/06 ,  G06F13/1673 ,  G06F13/28 ,  G06F2205/123 ,  G06F2205/126

Abstract: Example method includes: negotiating, with a client device, a number of simultaneous I/O commands allowed in a single session between a storage device and the client device; pre-allocating a number of immediate data buffers for the single session based on the negotiated number of simultaneous I/O commands; receiving a write I/O command with immediate data, wherein the immediate data is transmitted within a single PDU as the I/O command; transitioning the pre-allocated buffers from a network interface state to a driver state in an atomic operation, the driver state enabling the pre-allocated buffers to be accessed by a driver layer of the storage device exclusively, and the atomic operation preventing other I/O commands from transitioning the network interface state of the pre-allocated buffers until the atomic operation is completed; and writing the immediate data to the pre-allocated buffers that are in the driver state.

公开(公告)号：US20200334163A1

公开(公告)日：2020-10-22

申请号：US16389266

申请日：2019-04-19

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Gurinder Shergill ,  Kouei Yamada

IPC: G06F12/0888 ,  G06F12/0811

Abstract: Examples include storage class memory (SCM) queue depth threshold adjustment. Examples may adjust the SCM queue depth threshold of a controller based on whether an IO request latency threshold for an SCM read cache is exceeded. Examples may determine whether to process an IO request using the SCM read cache based on an SCM queue depth of the controller and the SCM queue depth threshold.

公开(公告)号：US10705968B2

公开(公告)日：2020-07-07

申请号：US16205742

申请日：2018-11-30

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Gurinder Shergill ,  Kouei Yamada

IPC: G06F12/08 ,  G06F12/0888

Abstract: Examples may bypass storage class memory (SCM) read cache based on a queue depth threshold. Examples may adjust a queue depth threshold for an SCM read cache based on an amount of data read from and written to the SCM read cache in a time period, and may bypass the SCM read cache based on a comparison of a number of outstanding IOs for the SCM read cache to a queue depth threshold for the SCM read cache.

公开(公告)号：US20200174938A1

公开(公告)日：2020-06-04

申请号：US16205742

申请日：2018-11-30

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Gurinder Shergill ,  Kouei Yamada

IPC: G06F12/0888

Abstract: Examples may bypass storage class memory (SCM) read cache based on a queue depth threshold. Examples may adjust a queue depth threshold for an SCM read cache based on an amount of data read from and written to the SCM read cache in a time period, and may bypass the SCM read cache based on a comparison of a number of outstanding IOs for the SCM read cache to a queue depth threshold for the SCM read cache.

公开(公告)号：US11030107B2

公开(公告)日：2021-06-08

申请号：US16389266

申请日：2019-04-19

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Gurinder Shergill ,  Kouei Yamada

IPC: G06F12/0888 ,  G06F12/0811

Abstract: Examples include storage class memory (SCM) queue depth threshold adjustment. Examples may adjust the SCM queue depth threshold of a controller based on whether an IO request latency threshold for an SCM read cache is exceeded. Examples may determine whether to process an IO request using the SCM read cache based on an SCM queue depth of the controller and the SCM queue depth threshold.

公开(公告)号：US10922233B2

公开(公告)日：2021-02-16

申请号：US16389266

申请日：2019-04-19

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Gurinder Shergill ,  Kouei Yamada

IPC: G06F12/0888 ,  G06F12/0811

Abstract: Examples include storage class memory (SCM) queue depth threshold adjustment. Examples may adjust the SCM queue depth threshold of a controller based on whether an IO request latency threshold for an SCM read cache is exceeded. Examples may determine whether to process an IO request using the SCM read cache based on an SCM queue depth of the controller and the SCM queue depth threshold.

公开(公告)号：US10776276B2

公开(公告)日：2020-09-15

申请号：US16205742

申请日：2018-11-30

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Gurinder Shergill ,  Kouei Yamada

IPC: G06F12/08 ,  G06F12/0888 ,  G06F3/06

Abstract: Examples may bypass storage class memory (SCM) read cache based on a queue depth threshold. Examples may adjust a queue depth threshold for an SCM read cache based on an amount of data read from and written to the SCM read cache in a time period, and may bypass the SCM read cache based on a comparison of a number of outstanding IOs for the SCM read cache to a queue depth threshold for the SCM read cache.

公开(公告)号：US10310811B2

公开(公告)日：2019-06-04

申请号：US15476697

申请日：2017-03-31

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Gurinder Shergill ,  Roopesh Kumar Tamma ,  Thomas H. Marlette

IPC: G06F3/06 ,  G06F13/28 ,  G06F5/14 ,  G06F13/16 ,  G06F5/06

Abstract: Example method includes: negotiating, with a client device, a number of simultaneous I/O commands allowed in a single session between a storage device and the client device; pre-allocating a number of immediate data buffers for the single session based on the negotiated number of simultaneous I/O commands; receiving a write I/O command with immediate data, wherein the immediate data is transmitted within a single PDU as the I/O command; transitioning the pre-allocated buffers from a network interface state to a driver state in an atomic operation, the driver state enabling the pre-allocated buffers to be accessed by a driver layer of the storage device exclusively, and the atomic operation preventing other I/O commands from transitioning the network interface state of the pre-allocated buffers until the atomic operation is completed; and writing the immediate data to the pre-allocated buffers that are in the driver state.