公开(公告)号：US20220011841A1

公开(公告)日：2022-01-13

申请号：US16925928

申请日：2020-07-10

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Hong Yi Wee ,  Kah Hoe Ng ,  Shiyu Tian

IPC: G06F1/30 ,  G06F1/3296 ,  G06F1/28

Abstract: Systems and methods disclosed herein allow efficient reallocation of PoE when a PSU for a PSE fails. A PSE initially receives power from at least two PSUs and provides PoE to at least two PDs. When power from one of the PSUs becomes unavailable, the PSE refrains from providing PoE to a first PD, but continues providing PoE to a second PD. The PSE sends a communication to the second PD requesting that the second PD allow the PSE to allocate less power to the second. If the second PD confirms that allocating less power to the second PD is acceptable, the PSE reduces the amount of power allocated to the second PD and allocates at least some of the power saved by the reduction to the first PD.

公开(公告)号：US11797070B2

公开(公告)日：2023-10-24

申请号：US16925928

申请日：2020-07-10

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Hong Yi Wee ,  Kah Hoe Ng ,  Shiyu Tian

IPC: G06F1/3296 ,  G06F1/30 ,  G06F1/28

CPC classification number: G06F1/30 ,  G06F1/28 ,  G06F1/3296

Abstract: Systems and methods disclosed herein allow efficient reallocation of PoE when a PSU for a PSE fails. A PSE initially receives power from at least two PSUs and provides PoE to at least two PDs. When power from one of the PSUs becomes unavailable, the PSE refrains from providing PoE to a first PD, but continues providing PoE to a second PD. The PSE sends a communication to the second PD requesting that the second PD allow the PSE to allocate less power to the second. If the second PD confirms that allocating less power to the second PD is acceptable, the PSE reduces the amount of power allocated to the second PD and allocates at least some of the power saved by the reduction to the first PD.

公开(公告)号：US11949522B2

公开(公告)日：2024-04-02

申请号：US17395075

申请日：2021-08-05

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Shiyu Tian ,  Kah Hoe Ng ,  Hong Yi Wee

IPC: H04L12/10 ,  H04L12/04 ,  H04L12/06

CPC classification number: H04L12/10 ,  H04L12/04 ,  H04L12/06

Abstract: One aspect provides a power sourcing equipment controller for providing power to a powered device using power-over-Ethernet (PoE). The power sourcing equipment includes a voltage-output logic block to output a sequence of voltage signals, the voltage signals comprising at least a detection signal and a classification signal; a current-measurement logic block to measure current provided responsive to the voltage signals; a backoff-time-determination logic block to determine a backoff time in response to the current-measurement logic block detecting the provided current exceeding a predetermined threshold, the backoff time being determined based on an amount of time needed for discharging an internal capacitor associated with the powered device; and a timing logic block to cause the voltage-output logic block to delay the output of a next sequence of voltage signals based on the determined backoff time, thereby facilitating powering up of a device compliant with a different PoE standard.

公开(公告)号：US20230038813A1

公开(公告)日：2023-02-09

申请号：US17395075

申请日：2021-08-05

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Shiyu Tian ,  Kah Hoe Ng ,  Hong Yi Wee

IPC: H04L12/10 ,  H04L12/04 ,  H04L12/06

Abstract: One aspect provides a power sourcing equipment controller for providing power to a powered device using power-over-Ethernet (PoE). The power sourcing equipment includes a voltage-output logic block to output a sequence of voltage signals, the voltage signals comprising at least a detection signal and a classification signal; a current-measurement logic block to measure current provided responsive to the voltage signals; a backoff-time-determination logic block to determine a backoff time in response to the current-measurement logic block detecting the provided current exceeding a predetermined threshold, the backoff time being determined based on an amount of time needed for discharging an internal capacitor associated with the powered device; and a timing logic block to cause the voltage-output logic block to delay the output of a next sequence of voltage signals based on the determined backoff time, thereby facilitating powering up of a device compliant with a different PoE standard.

公开(公告)号：US11747886B2

公开(公告)日：2023-09-05

申请号：US17591376

申请日：2022-02-02

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Hong Yi Wee ,  Kah Hoe Ng ,  Shiyu Tian

IPC: G06F1/32 ,  G06F1/3287 ,  G06F1/3296 ,  G06F1/3206

CPC classification number: G06F1/3287 ,  G06F1/3206 ,  G06F1/3296

Abstract: Example implementations relate to a power sourcing equipment (PSE), and a method of reallocating power to one or more powered devices (PDs) by the PSE, before a swap event of a power supply unit (PSU). The method includes receiving an information about the swap event, determining based on the information that the swap event is expected to cause powering down of the one or more PDs, and requesting a first PD among the one or more PDs to permit the PSE to reduce an initial value of power allocated to the first PD. Further, the method includes reducing an amount of power to the first PD from the initial value to a reduced value of power based on a response from the first PD, and reallocating the reduced value of the power to the first PD to avoid powering down of the one or more PDs during the swap event.

公开(公告)号：US20230244295A1

公开(公告)日：2023-08-03

申请号：US17591376

申请日：2022-02-02

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Hong Yi Wee ,  Kah Hoe Ng ,  Shiyu Tian

IPC: G06F1/3287 ,  G06F1/3206 ,  G06F1/3296

CPC classification number: G06F1/3287 ,  G06F1/3206 ,  G06F1/3296

Abstract: Example implementations relate to a power sourcing equipment (PSE), and a method of reallocating power to one or more powered devices (PDs) by the PSE, before a swap event of a power supply unit (PSU). The method includes receiving an information about the swap event, determining based on the information that the swap event is expected to cause powering down of the one or more PDs, and requesting a first PD among the one or more PDs to permit the PSE to reduce an initial value of power allocated to the first PD. Further, the method includes reducing an amount of power to the first PD from the initial value to a reduced value of power based on a response from the first PD, and reallocating the reduced value of the power to the first PD to avoid powering down of the one or more PDs during the swap event.

公开(公告)号：US11576278B2

公开(公告)日：2023-02-07

申请号：US17248085

申请日：2021-01-08

Applicant: Hewlett Packard Enterprise Development LP

Inventor： See Yun Yow ,  Hong Yi Wee ,  Kelly Khe Liq Khoo

IPC: H05K7/20

Abstract: Example implementations relate to a dual-sided fan tray assembly of an electronic system. The fan tray assembly includes a housing having a front panel, a back panel, and a pair of side walls coupled to the front and back panels. The fan tray assembly further includes a handle assembly pivotably connected to the pair of side walls such that the handle assembly is at least rotatable around the housing to at least first and second positions spaced apart from each other. When the handle assembly is rotated to the first position, the fan tray assembly is slidably insertable into a chassis of an electronic system with the front panel facing the chassis to install the fan tray assembly to the electronic system. When the handle assembly is rotated to the second position, the fan tray assembly is slidably insertable into the chassis with the back panel facing the chassis.

公开(公告)号：US20220225535A1

公开(公告)日：2022-07-14

申请号：US17248085

申请日：2021-01-08

Applicant: Hewlett Packard Enterprise Development LP

Inventor： See Yun Yow ,  Hong Yi Wee ,  Kelly Khe Liq Khoo

IPC: H05K7/20

Abstract: Example implementations relate to a dual-sided fan tray assembly of an electronic system. The fan tray assembly includes a housing having a front panel, a back panel, and a pair of side walls coupled to the front and back panels. The fan tray assembly further includes a handle assembly pivotably connected to the pair of side walls such that the handle assembly is at least rotatable around the housing to at least first and second positions spaced apart from each other. When the handle assembly is rotated to the first position, the fan tray assembly is slidably insertable into a chassis of an electronic system with the front panel facing the chassis to install the fan tray assembly to the electronic system. When the handle assembly is rotated to the second position, the fan tray assembly is slidably insertable into the chassis with the back panel facing the chassis.