公开(公告)号：US20180373653A1

公开(公告)日：2018-12-27

申请号：US15629350

申请日：2017-06-21

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Gregory Lee Dykema ,  Joel Lach ,  Siamak Nazari ,  Michael T. Longenbach

IPC: G06F13/24 ,  G06F13/42 ,  G06F11/07

Abstract: An example computing resource may include computing circuitry that includes logic. The logic may be executable to receive a series of data and an end of transfer message associated with the series of data. The logic may also be executable to, in response to a determination that the end of transfer message indicates a request for acknowledgment, send an acknowledgment to a sender of the series of data after receipt of all the series of data at the computing circuitry is complete and before the series of data is committed to a memory associated with a processing resource. The memory and the processing resource are separate from the computing circuitry. The logic may also be executable to, in response to a request to commit received data, commit the acknowledged and uncommitted series of data to the memory associated with the processing resource and interrupt the processing resource. The interrupt indicates that the acknowledged series of data is committed to the memory associated with the processing resource.