公开(公告)号：US11132423B2

公开(公告)日：2021-09-28

申请号：US16176848

申请日：2018-10-31

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Soumitra Chatterjee ,  Mashood Abdulla K ,  Chinmay Ghosh ,  Mohan Parthasarathy

IPC: G06F17/16 ,  H03K19/177 ,  G06F9/30

Abstract: According to examples, an apparatus may include a processor and a non-transitory computer readable medium having instructions that when executed by the processor, may cause the processor to partition a matrix of elements into a plurality of sub-matrices of elements. Each sub-matrix of the plurality of sub-matrices may include elements from a set of columns of the matrix of elements that includes a nonzero element. The processor may also assign elements of the plurality of sub-matrices to a plurality of crossbar devices to maximize a number of nonzero elements of the matrix of elements assigned to the crossbar devices.