DEFAULT OPERATING MODES
    1.
    发明公开

    公开(公告)号:US20230289233A1

    公开(公告)日:2023-09-14

    申请号:US17690925

    申请日:2022-03-09

    CPC classification number: G06F9/5044 G06F9/44505 G06F11/3058

    Abstract: An example computing device includes a non-transitory machine-readable storage medium encoded with instructions and a processor to execute the instructions. The instructions are executable to detect a hardware configuration of the computing device by identifying hardware components within the computing device and determine an expected acoustic noise emission of the computing device based on the hardware configuration. The instructions are also executable to select a default operating mode of the computing device based on the hardware configuration and set the computing device to the default operating mode.

    REGULATING POWER CORE CONSUMPTION

    公开(公告)号:US20220075443A1

    公开(公告)日:2022-03-10

    申请号:US17420812

    申请日:2018-12-14

    Abstract: A method of regulating power consumption per core within a multi-core package may include estimating power draw for each core within the multi-core processing system. Estimating the power draw for each core within the multi-core processing system may include dividing a total power draw of the multi-core processing system by a number of active cores operating within the multi-core processing system multiplied by a percent utilization of the multi-core processing system. The method may include determining a thermal margin for the multi-core processing system, and instigating a lower power limit for the multi-core processing system in response to a determination that the thermal margin reduces to a predetermined level.

    POWER SUPPLY CONTROLLERS
    5.
    发明申请

    公开(公告)号:US20210089101A1

    公开(公告)日:2021-03-25

    申请号:US16980505

    申请日:2018-06-11

    Abstract: Example implementations relate to power supply controllers. In some examples, a controller can include instructions to: set a power threshold for a power supply coupled to a computing component when the computing component is operating in a first state, determine when the computing component is alternating from the first state to a second state, and allow the power supply to exceed the power threshold for a fixed period of time in response to the computing component alternating from the first state to the second state.

    Storage device carrier assembly
    6.
    发明授权

    公开(公告)号:US10810152B2

    公开(公告)日:2020-10-20

    申请号:US16238722

    申请日:2019-01-03

    Abstract: A computing system for housing a number of storage devices includes a number of device cages, and a backplane coupled to each of the device cages to electrically couple a number of the storage devices to the computing system. The backplane includes a number of device combination signal and power interfaces located on a first side of the backplane to couple a number of the storage devices to the backplane. The backplane further includes a number of combination signal and power interfaces located on a second side of the backplane to couple the backplane to the computing system. The backplane further includes a number of signal connectors to couple the backplane to the computing system.

    STYLUS NIBS
    7.
    发明申请
    STYLUS NIBS 审中-公开

    公开(公告)号:US20200026368A1

    公开(公告)日:2020-01-23

    申请号:US16484156

    申请日:2017-02-07

    Abstract: The present disclosure is drawn to a stylus nib, which includes a polymeric core structure having a plurality of channels formed within the polymeric core structure along a longitudinal axis thereof. The polymeric core structure can be internally lubricated or impregnated with a lubricating material. The tip portion of the nib can be shaped to interface with a drawing surface.

    STORAGE DEVICE CARRIER ASSEMBLY
    10.
    发明申请
    STORAGE DEVICE CARRIER ASSEMBLY 审中-公开
    存储设备载体组件

    公开(公告)号:US20160217097A1

    公开(公告)日:2016-07-28

    申请号:US14605909

    申请日:2015-01-26

    CPC classification number: G06F13/4068 G06F1/187 G11B33/128

    Abstract: A computing system for housing a number of storage devices includes a number of device cages, and a backplane coupled to each of the device cages to electrically couple a number of the storage devices to the computing system. The backplane includes a number of device combination signal and power interfaces located on a first side of the backplane to couple a number of the storage devices to the backplane. The backplane further includes a number of combination signal and power interfaces located on a second side of the backplane to couple the backplane to the computing system. The backplane further includes a number of signal connectors to couple the backplane to the computing system.

    Abstract translation: 用于容纳多个存储设备的计算系统包括多个设备保持架和耦合到每个设备保持架的背板,以将多个存储设备电耦合到计算系统。 背板包括位于背板的第一侧上的多个设备组合信号和电源接口,以将多个存储设备耦合到背板。 背板还包括位于背板的第二侧上的多个组合信号和电源接口,以将背板耦合到计算系统。 背板还包括多个信号连接器以将背板耦合到计算系统。

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