公开(公告)号：US20220342984A1

公开(公告)日：2022-10-27

申请号：US17761694

申请日：2019-10-25

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Maugan Villatel ,  David Plaquin ,  Christopher Ian Dalton

IPC: G06F21/55

Abstract: There is described a method including obtaining memory management configuration data, for example, from a memory management unit. The memory management configuration data is used to identify memory locations having a predetermined property. Content is monitored at the identified memory locations.

公开(公告)号：US20220164442A1

公开(公告)日：2022-05-26

申请号：US17602305

申请日：2019-08-12

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Christopher Ian Dalton ,  Maugan Villatel ,  Pierre Belgarric

IPC: G06F21/55 ,  G06F21/71 ,  G06F9/38 ,  G06F9/30 ,  G06F9/50

Abstract: There is provided a method for thread allocation in a multi-processor computing system. The method includes determining whether a thread for execution has a security requirement. The thread is allocated to one of a first processing unit or a second processing unit based on the determination. The thread is allocated for execution by the first processing unit based on the thread having the security requirement.

公开(公告)号：US20240097914A1

公开(公告)日：2024-03-21

申请号：US18453059

申请日：2023-08-21

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Thalia May Laing ,  Maugan Villatel ,  Pierre Louis Robert Belgarric ,  Adrian John Baldwin ,  Adrian Laurence Shaw ,  Remy Husson

IPC: H04L9/32

CPC classification number: H04L9/3247

Abstract: In an example, a computing device is described. The computing device comprises an interface to receive a request from a signer for a state. The state is to be used as an input to generate a key under a stateful signature scheme. The computing device further comprises a processor. The processor is to identify an available state that the signer is authorized to use in response to the request received via the interface. The available state is identified from a set of states that can be used by the signer to maintain statefulness of the stateful signature scheme. The processor is further to instruct a reply to be sent to the signer via the interface. The reply comprises an indication of the state that the signer is authorized to use.

公开(公告)号：US20180307629A1

公开(公告)日：2018-10-25

申请号：US15495902

申请日：2017-04-24

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Maugan Villatel ,  Richard A. Bramley, JR. ,  Valiuddin Y. Ali

IPC: G06F12/14 ,  G06F13/16 ,  G06F3/06 ,  G06F9/44

CPC classification number: G06F12/1491 ,  G06F3/0619 ,  G06F3/0622 ,  G06F3/065 ,  G06F3/0659 ,  G06F3/0685 ,  G06F9/4401 ,  G06F13/1663 ,  G06F2212/1052

Abstract: Example implementations relate to command source verification. An example device can include instructions executable to send a command via a predefined path to a predefined location within a memory resource storing instructions executable to verify a source of the command using a predefined protocol and execute the command in response to the source verification.

公开(公告)号：US20240097884A1

公开(公告)日：2024-03-21

申请号：US18453580

申请日：2023-08-22

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Thalia May Laing ,  Maugan Villatel ,  Pierre Louis Robert Belgarric ,  Adrian John Baldwin ,  Adrian Laurence Shaw

IPC: H04L9/08 ,  H04L9/32

CPC classification number: H04L9/0816 ,  H04L9/32

Abstract: In an example, a computing device is described. The computing device comprises a memory to store a set of states and a corresponding set of non-overlapping time intervals. The computing device further comprises a timing unit to indicate a time at which a signature is to be produced. The computing device further comprises a processor to: identify which time interval of the set of non-overlapping time intervals includes the indicated time; generate a signing key based on a state associated with the identified time interval; and produce a signature, under a stateful signature scheme, with the signing key.

公开(公告)号：US20210357220A1

公开(公告)日：2021-11-18

申请号：US16606762

申请日：2018-07-31

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Pierre Belgarric ,  Christopher l. Dalton ,  David Plaquin ,  Maugan Villatel ,  Joshua Serratelli Schiffman

IPC: G06F9/30

Abstract: Examples include an example computing system comprising a first storage to store executable code, wherein the executable code comprises a plurality of instructions, a second storage to store a first parameter of the executable code, a processing unit to execute each of the instructions of the code, and a monitoring component to, upon execution of each of the instructions of the code by the processing unit, update a second parameter of the code based on that instruction, wherein the monitoring component is to compare the first parameter and the second parameter, and to control execution of further executable code by the processing unit based on the comparison.

公开(公告)号：US20160125201A1

公开(公告)日：2016-05-05

申请号：US14754898

申请日：2015-06-30

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Maugan Villatel ,  Boris Balacheff ,  Chris I. Dalton ,  David Plaquin ,  Adrian Shaw ,  Simon Kai-Ying Shiu

IPC: G06F21/62 ,  G06F17/30

CPC classification number: G06F21/74 ,  G06F9/46 ,  G06F17/30 ,  G06F21/53 ,  G06F21/62 ,  G06F21/6281 ,  G06F21/629

Abstract: A data processing system supporting a secure domain and a non-secure domain comprises a hardware component, and a processor device having operating modes in the secure domain and non-secure domain, the processor device to execute a secure application in the secure domain. The hardware component has a property having a secure state. The property of the hardware component in the secure state may only be reconfigured responsive to instructions received from the secure domain. The secure application is operative to implement a configuration service to configure the property of the hardware component in the secure state, responsive to a request received from the non-secure domain according to an application programming interface associated with the secure application.

Abstract translation: 支持安全域和非安全域的数据处理系统包括硬件组件和在安全域和非安全域中具有操作模式的处理器设备，处理器设备在安全域中执行安全应用。 硬件组件具有具有安全状态的属性。 硬件组件处于安全状态的属性可能只能根据从安全域接收到的指令进行重新配置。 响应于根据与安全应用相关联的应用编程接口从非安全域接收的请求，安全应用程序可操作以实现配置服务以配置处于安全状态的硬件组件的属性。

公开(公告)号：US20240097905A1

公开(公告)日：2024-03-21

申请号：US18454495

申请日：2023-08-23

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Thalia May Laing ,  Maugan Villatel ,  Adrian John Baldwin ,  Pierre Louis Robert Belgarric ,  Adrian Laurence Shaw

IPC: H04L9/32

CPC classification number: H04L9/3215 ,  H04L9/3228 ,  H04L9/3247

Abstract: In an example, a computing device is described. The computing device comprises a processor. The processor is to generate a key using a value as an input to generate the key. The processor is further to, in response to generating the key, exclude the value from future use as the input. The processor is further to store an indication of a subsequent value to use as the input to generate a subsequent key. The indication is cryptographically associated with an entity to control third-party access to the indication.

公开(公告)号：US11328055B2

公开(公告)日：2022-05-10

申请号：US16606740

申请日：2018-01-31

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Maugan Villatel ,  Adrian Baldwin ,  Gaetan Wattiau

IPC: G06F21/53 ,  G06F21/12 ,  G06F21/56 ,  G06F21/55

Abstract: Examples associated with process verification are described. One example includes a process operating in a general operating environment of the system. From an isolated environment, a protection module modifies the behavior of the process by modifying data associated with the process while the process is in operation. The protection module verifies whether the behavior of the process has changed in accordance with the modification. The protection module takes a remedial action upon determining the process has been compromised.

公开(公告)号：US10747873B2

公开(公告)日：2020-08-18

申请号：US15747983

申请日：2016-01-26

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Richard A. Bramley, Jr. ,  David Plaquin ,  Maugan Villatel ,  Jeffrey K. Jeansonne

IPC: G06F21/53 ,  G06F21/55 ,  G06F21/57 ,  G06F21/62 ,  G06F21/74

Abstract: In one example, a system for a system management mode (SMM) privilege architecture includes a computing device comprising: a first portion of SMM instructions to set up a number of resources and implement a privilege architecture for the SMM of a computing device and a second portion of SMM instructions to execute a number of functions during the SMM of the computing device, wherein the privilege architecture assigns the first portion of SMM instructions to a first privilege level and assigns the second portion of SMM instructions to a second privilege level.