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1.发明授权
公开(公告)号：US3689903A
公开(公告)日：1972-09-05
申请号：US3689903D
申请日：1970-10-16
Applicant: HONEYWELL INC
Inventor： AGRAWALA ASHOK K , DIXON SAMUEL J , SOLLMAN GEORGE H
CPC classification number: H03L7/091 , G11B20/1403
Abstract: A voltage controlled oscillator output frequency is constrained to follow the highest component of significant transitions in an input signal by allowing the input signal to change oscillatorcontrolling voltages only within a predetermined period after receipt of an input signal transition. The output frequency is maintained at its last corrected value between periods of change. The oscillator forms part of a phase lock loop for establishing a clock to recover variable frequency recorded information.
Abstract translation: 通过允许输入信号仅在接收到输入信号转换之后的预定时段内改变振荡器控制电压，受压控振荡器输出频率被限制为跟随输入信号中的重要转变的最高分量。 输出频率在变化期间保持在其最后的校正值。 振荡器构成锁相环的一部分，用于建立时钟以恢复可变频率记录的信息。
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公开(公告)号：US3671960A
公开(公告)日：1972-06-20
申请号：US3671960D
申请日：1970-07-06
Applicant: HONEYWELL INC
Inventor： SOLLMAN GEORGE H , DIXON SAMUEL J
CPC classification number: G11B20/1423 , H04L25/4904
Abstract: A multiphase encoder translates the bits of a Non-Return-to-Zero digital signal into a three frequency self-clocking signal characterized by having a data transition at the center of a binary ONE bit and a data transition between successive binary ZERO bits.
Abstract translation: 多相编码器将非归零数字信号的位转换为三频自准时信号，其特征在于具有二进制1位中心的数据转换和连续的二进制零位之间的数据转换。
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公开(公告)号：US3697977A
公开(公告)日：1972-10-10
申请号：US3697977D
申请日：1970-07-06
Applicant: HONEYWELL INC
Inventor： SOLLMAN GEORGE H , DIXON SAMUEL J
CPC classification number: H04L25/4904 , G11B20/1423
Abstract: A multiphase encoder translates the bits of a Non-Return-to-Zero digital signal into a three frequency self-clocking having a data transition at the center of a binary ONE bit and a data transition between successive binary ZERO bits.
Abstract translation: 多相编码器将非归零数字信号的位转换为具有二进制1位中心的数据转换和连续二进制零位之间的数据转换的三频自准时。
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公开(公告)号：US3678503A
公开(公告)日：1972-07-18
申请号：US3678503D
申请日：1970-07-06
Applicant: HONEYWELL INC
Inventor： SOLLMAN GEORGE H
CPC classification number: H04L25/4904 , G11B20/1423
Abstract: A multiphase encoder translates the bits of a Non-Return-to-Zero digital signal into a three frequency self-clocking signal characterized by having a data transition at the center of a binary ONE bit and a data transition between successive binary ZERO bits.
Abstract translation: 多相编码器将非归零数字信号的位转换为三频自准时信号，其特征在于具有二进制1位中心的数据转换和连续的二进制零位之间的数据转换。
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