公开(公告)号：US20240243815A1

公开(公告)日：2024-07-18

申请号：US18618399

申请日：2024-03-27

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Xuefeng TANG ,  Qiang JIN ,  Wing Chau NG ,  Chuandong LI

IPC: H04B10/54 ,  H04L27/36

CPC classification number: H04B10/541 ,  H04L27/36

Abstract: Systems and methods for In-phase and Quadrature modulation. The method includes i) processing In-phase digital signals and Quadrature digital signals and generating PT modulated In-phase analog signals and PT modulated Quadrature analog signals, ii) receiving an optical signal, iii) modulating the optical signal in accordance with the PT modulated In-phase analog signals and the PT modulated Quadrature analog signals and generate PT modulated In-phase optical signals and PT modulated Quadrature optical signals, iv) biasing the PT modulated In-phase optical signals and the PT modulated Quadrature optical signals to a null point, v) adjusting a phase bias point of the PT modulated Quadrature optical signals and generating phase adjusted PT modulated Quadrature optical signals, and vi) combining the PT modulated In-phase optical signals and phase adjusted PT modulated Quadrature optical signal and generate a combined PT modulated optical signal to be transmitted towards a receiver.

公开(公告)号：US20250030385A1

公开(公告)日：2025-01-23

申请号：US18353433

申请日：2023-07-17

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Jianhong KE ,  Xuefeng TANG ,  Chuandong LI

IPC: H03F1/32 ,  H04B1/04

Abstract: Pre-compensation for linear and non-linear distortion in data symbols comprises generating a set of data symbols to be transmitted and converting the set into a set of frequency-domain samples, which are then pre-processed. Linear distortion compensation is provided, prior to compensating for non-linear distortions, to the pre-processed set of frequency-domain samples. The linear distortion compensated set of frequency-domain samples is converted into a linear distortion compensated set of time domain samples. Non-linear distortion compensation is provided to the linear distortion compensated set of time domain samples. A Pattern Dependent Lookup Table (PDLUT) is generated by receiving consecutive sequences of samples included in a set of time domain samples, quantizing the consecutive sequences of samples into integer-valued consecutive sequences of samples, computing error correction values corresponding to the integer-valued consecutive sequences of samples, and storing the indexes of integer-valued consecutive sequences of samples and the corresponding error correction values in the PDLUT.

公开(公告)号：US20230318613A1

公开(公告)日：2023-10-05

申请号：US18140145

申请日：2023-04-27

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jianhong KE ,  Zilong HE ,  Chuandong LI

IPC: H03M1/12 ,  H03M1/60

CPC classification number: H03M1/1255 ,  H03M1/60

Abstract: A digital signal processor (DSP) for a receiver and a method for processing signals in a receiver are provided. The DSP comprises a processor configured to: receive a digital signal at a symbol rate in a frequency domain; and compensate an impairment of the digital signal in the frequency domain.

公开(公告)号：US20240305375A1

公开(公告)日：2024-09-12

申请号：US18181819

申请日：2023-03-10

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Jianhong KE ,  Hongliang LI ,  Xuefeng TANG ,  Chuandong LI

IPC: H04B10/2507 ,  G06N20/00

CPC classification number: H04B10/2507 ,  G06N20/00

Abstract: The disclosed systems, and methods are directed to compressing a Pattern Dependent Look-up Table (PDLUT) including distortion correction values corresponding to data symbol sequences, including: i) symmetrically rearranging the data symbol sequences and the associated distortion correction values; ii) folding and amplitude reversing a second half of the rearranged data symbol sequences and the associated distortion correction values; iii) determining approximate distortion correction values for a first half of the rearranged data symbol sequences based on the distortion correction values associated with the first half of the rearranged data symbol sequences and the folded and amplitude reversed distortion correction values associated with the second half of the data symbol sequences; and iv) updating the PDLUT based on the approximate distortion values corresponding to the first half of the rearranged data symbol sequences.

公开(公告)号：US20210328680A1

公开(公告)日：2021-10-21

申请号：US17227678

申请日：2021-04-12

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Jianhong KE ,  Chuandong LI

IPC: H04B10/50 ,  H04B7/0417 ,  H04B7/0456 ,  H04B10/2507 ,  H04B10/548

Abstract: The disclosed systems, structures, and methods are directed to a single-stage frequency-domain equalization (FDEQ) structure implemented on a processor, comprising a data preprocessing unit configured to concatenate received data samples in time-domain digital signals, transform the concatenated data samples in the time-domain digital signals to frequency-domain digital signals, and an adaptive equalizer comprising 2×2 multiple-input multiple output (MIMO) configured to compensate for non-time-varying fixed impairments and time-varying adaptive impairments in the frequency-domain digital signals.