Chip package, electronic device, and chip package preparation method

    公开(公告)号:US12266617B2

    公开(公告)日:2025-04-01

    申请号:US17746186

    申请日:2022-05-17

    Abstract: A chip package includes a substrate, a first die, a second die, and a beam structure. The first die and the second die are disposed on a side of the substrate and are electrically connected to the substrate. The beam structure is disposed between the first die and the second die. A first end of the beam structure is stacked with and fixedly connected to a part of the first die, a second end is stacked with and fixedly connected to a part of the second die, and the beam structure is insulated from and connected to the first die and the second die. A thermal expansion coefficient of the beam structure is less than a thermal expansion coefficient of the substrate.

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