公开(公告)号：US20230205530A1

公开(公告)日：2023-06-29

申请号：US18172492

申请日：2023-02-22

Applicant: Huawei Technologies Co., Ltd.

Inventor： Ruoyu Zhou ,  Fan Zhu ,  Wenbo Sun ,  Xiping Zhou

IPC: G06F9/30

CPC classification number: G06F9/30163 ,  G06F9/30007

Abstract: This application provides a graph instruction processing method and apparatus. The method is applied to a processor, and includes: detecting whether a first input and a second input of a first graph instruction are in a ready-to-complete state, where the first input and/or the second input are or is a dynamic data input or dynamic data inputs of the first graph instruction.

公开(公告)号：US12086592B2

公开(公告)日：2024-09-10

申请号：US18070781

申请日：2022-11-29

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Xiping Zhou ,  Ruoyu Zhou ,  Fan Zhu ,  Wenbo Sun

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/30076 ,  G06F9/30087 ,  G06F9/3836

Abstract: This application discloses a processor, a processing method, and a related device. The processor includes a processor core. The processor core includes an instruction dispatching unit and a graph flow unit and at least one general-purpose operation unit that are connected to the instruction dispatching unit. The instruction dispatching unit is configured to: allocate a general-purpose calculation instruction in a decoded to-be-executed instruction to the at least one general-purpose calculation unit, and allocate a graph calculation control instruction in the decoded to-be-executed instruction to the graph calculation unit, where the general-purpose calculation instruction is used to instruct to execute a general-purpose calculation task, and the graph calculation control instruction is used to instruct to execute a graph calculation task. The at least one general-purpose operation unit is configured to execute the general-purpose calculation instruction. The graph flow unit is configured to execute the graph calculation control instruction.

公开(公告)号：US12124851B2

公开(公告)日：2024-10-22

申请号：US18067538

申请日：2022-12-16

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Ruoyu Zhou ,  Fan Zhu ,  Wenbo Sun ,  Xiping Zhou

IPC: G06F9/30

CPC classification number: G06F9/30058

Abstract: Disclosed are a graph instruction processing method and apparatus, which relates to the field of computer technologies One example method includes: detecting whether a first graph instruction has a conditional instruction element; and when the first graph instruction has the conditional instruction element, determining that the first graph instruction is a conditional execution instruction, and processing the first graph instruction when both data flow information and control flow information of the first graph instruction are in a ready state; or when the first graph instruction does not have a conditional instruction element, determining that the first graph instruction is a non-conditional execution instruction, and processing the first graph instruction when data flow information of the first graph instruction is in a ready state.

公开(公告)号：US20240136917A1

公开(公告)日：2024-04-25

申请号：US18399724

申请日：2023-12-29

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Luyu Wang ,  Shuyu Ou ,  Chao Wu ,  Wenbo Sun ,  Grover Victor Torrico-Bascopé

IPC: H02M1/36 ,  H02M1/00 ,  H02M1/42 ,  H02M3/07 ,  H02M3/158 ,  H02M7/217

CPC classification number: H02M1/36 ,  H02M1/007 ,  H02M1/0095 ,  H02M1/4208 ,  H02M3/07 ,  H02M3/158 ,  H02M7/217 ,  H02M1/0096

Abstract: An AC-DC power converter has a power factor correction stage that receives grid power and produces DC bus power. A DC-DC converter stage receives the DC bus power and produces a DC output power. Energy storage is provided by a larger capacitance value first capacitor and a smaller capacitance value second capacitor coupled in series across the DC bus power with a switching device coupled in parallel with the smaller second capacitor. During converter start-up, the switching device is turned off and inrush current is controlled by transferring energy from the second capacitor to the first capacitor. During operation the switching device is turned on and the first capacitor provides energy storage for the DC bus power. When grid power is disconnected, hold-up time is extended by turning the switching device off and transferring energy from the first capacitor to the second capacitor.

公开(公告)号：US20230297385A1

公开(公告)日：2023-09-21

申请号：US18312365

申请日：2023-05-04

Applicant: Huawei Technologies Co., Ltd.

Inventor： Fan Zhu ,  Ruoyu Zhou ,  Wenbo Sun ,  Xiping Zhou

IPC: G06F9/38 ,  G06F9/30

CPC classification number: G06F9/3842 ,  G06F9/30047 ,  G06F9/30189

Abstract: A graphflow apparatus includes an information buffer (IB) and a load queue (LQ). The IB is configured to cache an instruction queue. The LQ is used to cache a read instruction queue. The IB includes a speculative bit and a speculative identity (ID) field. The speculative bit indicates whether a current instruction is a speculatively-executable instruction. The speculative ID field stores a speculative ID of one speculative operation on the current instruction.